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Searched refs:COMBINE (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_tex.c403 #define COMBINE(x, y) x, y macro
407 COMBINE(0, 0),
417 COMBINE(0, 0),
418 COMBINE(1, 0),
427 COMBINE(0, 0),
428 COMBINE(1, 0),
429 COMBINE(0, 1),
430 COMBINE(1, 1),
437 COMBINE(0, 0),
438 COMBINE(1, 0),
[all …]
/external/v8/src/
Dregister-configuration.cc105 kSimpleFPAliasing ? AliasingKind::OVERLAP : AliasingKind::COMBINE, in ArchDefaultRegisterConfiguration()
172 if (fp_aliasing_kind_ == COMBINE) { in RegisterConfiguration()
222 DCHECK(fp_aliasing_kind_ == COMBINE); in GetAliases()
248 DCHECK(fp_aliasing_kind_ == COMBINE); in AreAliases()
Dregister-configuration.h23 COMBINE enumerator
/external/llvm/test/Transforms/AddDiscriminators/
Doneline.ll42 ; CHECK: store i32 99, i32* %1, align 4, !dbg ![[COMBINE:[0-9]+]]
45 ; CHECK: br label %10, !dbg ![[COMBINE]]
97 ; CHECK: ![[COMBINE]] = !DILocation(line: 2, column: 42, scope: ![[COMBINEBLOCK:[0-9]+]])
/external/skia/src/core/
DSkBlitMask_D32.cpp154 #define COMBINE(e0, e1, m) ((((e0) >> 8) & (m)) | ((e1) & ~(m))) macro
175 dst[i] = COMBINE(s0 + d0, s1 + d1, rbmask); in A8_RowProc_Opaque()
/external/skqp/src/core/
DSkBlitMask_D32.cpp154 #define COMBINE(e0, e1, m) ((((e0) >> 8) & (m)) | ((e1) & ~(m))) macro
175 dst[i] = COMBINE(s0 + d0, s1 + d1, rbmask); in A8_RowProc_Opaque()
/external/icu/icu4c/source/common/
Dushape.cpp60 #define COMBINE (SHADDA+CSHADDA) macro
1524 … if (aggregate_tashkeel && ((prevLink|currLink)&COMBINE) == COMBINE && aggregation_possible) { in u_shapeArabic()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.h51 COMBINE, enumerator
DHexagonISelLowering.cpp1382 Result = DAG.getNode(HexagonISD::COMBINE, DL, MVT::i64, Tmp4, Tmp2); in LowerLOAD()
2202 case HexagonISD::COMBINE: return "HexagonISD::COMBINE"; in getTargetNodeName()
2435 return DAG.getNode(HexagonISD::COMBINE, dl, VT, V1, V0); in LowerBUILD_VECTOR()
2441 return DAG.getNode(HexagonISD::COMBINE, dl, VT, V1, V0); in LowerBUILD_VECTOR()
2513 Operand = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, Operand); in LowerBUILD_VECTOR()
2547 return DAG.getNode(HexagonISD::COMBINE, dl, VT, Op.getOperand(1), Vec0); in LowerCONCAT_VECTORS()
2578 OpN = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, OpN); in LowerCONCAT_VECTORS()
2704 Val = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, Val); in LowerINSERT_VECTOR()
DHexagonInstrInfo.td115 def HexagonCOMBINE : SDNode<"HexagonISD::COMBINE", SDTHexagonI64I32I32>;
/external/clang/include/clang/Basic/
Darm_neon.td1124 def COMBINE : NoTestOpInst<"vcombine", "kdd", "dPl", OP_CONC>;