Searched refs:CTC1 (Results 1 – 15 of 15) sorted by relevance
| /external/v8/src/mips/ |
| D | disasm-mips.cc | 499 if ((CTC1 == instr->RsFieldRaw()) || (CFC1 == instr->RsFieldRaw())) { in FormatFPURegister()
1349 case CTC1: in DecodeTypeRegister()
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| D | constants-mips.h | 500 CTC1 = ((0U << 3) + 6) << 21, enumerator
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| D | assembler-mips.cc | 2339 GenInstrRegister(COP1, CTC1, rt, fs); in ctc1()
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| D | simulator-mips.cc | 3558 case CTC1: { in DecodeTypeRegisterCOP1()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 122 Opc = Mips::CTC1; in copyPhysReg()
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| D | MipsInstrFPU.td | 175 def CTC1 : FFRGPR<0x6, (outs CCR:$fs), (ins CPURegs:$rt),
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| /external/v8/src/mips64/ |
| D | disasm-mips64.cc | 515 if ((CTC1 == instr->RsFieldRaw()) || (CFC1 == instr->RsFieldRaw())) { in FormatFPURegister()
1105 case CTC1: in DecodeTypeRegisterCOP1()
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| D | constants-mips64.h | 530 CTC1 = ((0U << 3) + 6) << 21, enumerator
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| D | assembler-mips64.cc | 2672 GenInstrRegister(COP1, CTC1, rt, fs); in ctc1()
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| D | simulator-mips64.cc | 3447 case CTC1: { in DecodeTypeRegisterCOP1()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 116 Opc = Mips::CTC1; in copyPhysReg()
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| D | MipsInstrFPU.td | 365 def CTC1 : MMRel, MTC1_FT<"ctc1", CCROpnd, GPR32Opnd, II_CTC1>, MFC1_FM<6>;
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 463 704592U, // CTC1
2177 0U, // CTC1
4534 // CTC1, CTC1_MM, DAHI, DATI, DMTC1, MTC1, MTC1_MM, MTHC1_MM, MTHI_DSP, M...
4585 // CTC1, CTC1_MM, DMTC1, MTC1, MTC1_MM, MTHC1_MM, MTHI_DSP, MTHLIP, MTLO_...
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| D | MipsGenDisassemblerTables.inc | 823 /* 1677 */ MCD_OPC_Decode, 190, 3, 66, // Opcode: CTC1
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3152 TOut.emitRR(Mips::CTC1, Mips::RA, ATReg, IDLoc, STI); in expandTrunc()
3157 TOut.emitRR(Mips::CTC1, Mips::RA, ThirdReg, IDLoc, STI); in expandTrunc()
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