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Searched refs:CVT_S_L (Results 1 – 13 of 13) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.h577 CVT_S_L = ((4U << 3) + 0), enumerator
Ddisasm-mips.cc957 case CVT_S_L: in DecodeTypeRegisterLRsType()
Dassembler-mips.cc2850 GenInstrRegister(COP1, L, f0, fs, fd, CVT_S_L); in cvt_s_l()
Dsimulator-mips.cc3453 case CVT_S_L: in DecodeTypeRegisterLRsType()
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrFPU.td149 def CVT_S_L : FFR1<0x20, 21, "cvt", "s.l", FGR32, FGR64>;
/external/v8/src/mips64/
Dconstants-mips64.h606 CVT_S_L = ((4U << 3) + 0), enumerator
Ddisasm-mips64.cc998 case CVT_S_L: in DecodeTypeRegisterLRsType()
Dassembler-mips64.cc3099 GenInstrRegister(COP1, L, f0, fs, fd, CVT_S_L); in cvt_s_l()
Dsimulator-mips64.cc3341 case CVT_S_L: in DecodeTypeRegisterLRsType()
/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp375 expandCvtFPInt(MBB, MI, Mips::CVT_S_L, Mips::DMTC1, true); in expandPostRAPseudo()
DMipsInstrFPU.td328 def CVT_S_L : ABSS_FT<"cvt.s.l", FGR32Opnd, FGR64Opnd, II_CVT>,
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc480 21854U, // CVT_S_L
2194 0U, // CVT_S_L
DMipsGenDisassemblerTables.inc4299 /* 943 */ MCD_OPC_Decode, 207, 3, 236, 1, // Opcode: CVT_S_L