Searched refs:DefMO (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegStackify.cpp | 550 MachineOperand &DefMO = Def->getOperand(0); in MoveAndTeeForMultiUse() local
554 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in MoveAndTeeForMultiUse()
556 DefMO.setReg(DefReg); in MoveAndTeeForMultiUse()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | MachineLICM.cpp | 914 MachineOperand &DefMO = MI.getOperand(i); in IsCheapInstruction() local
915 if (!DefMO.isReg() || !DefMO.isDef()) in IsCheapInstruction()
918 unsigned Reg = DefMO.getReg(); in IsCheapInstruction()
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| D | VirtRegRewriter.cpp | 2362 MachineOperand *DefMO = MI.findRegisterDefOperand(DestReg); in RewriteMBB() local
2365 .addReg(DestReg, RegState::Define, DefMO->getSubReg()) in RewriteMBB()
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| /external/llvm/lib/CodeGen/ |
| D | MachineLICM.cpp | 1005 MachineOperand &DefMO = MI.getOperand(i); in IsCheapInstruction() local
1006 if (!DefMO.isReg() || !DefMO.isDef()) in IsCheapInstruction()
1009 unsigned Reg = DefMO.getReg(); in IsCheapInstruction()
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| D | MachineInstr.cpp | 1400 MachineOperand &DefMO = getOperand(DefIdx); in tieOperands() local
1402 assert(DefMO.isDef() && "DefIdx must be a def operand"); in tieOperands()
1404 assert(!DefMO.isTied() && "Def is already tied to another use"); in tieOperands()
1418 DefMO.TiedTo = std::min(UseIdx + 1, TiedMax); in tieOperands()
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| D | RegisterCoalescer.cpp | 967 MachineOperand &DefMO = NewMI.getOperand(0); in reMaterializeTrivialDef() local
968 if (DefMO.getSubReg() == DstIdx) { in reMaterializeTrivialDef()
977 DefMO.setSubReg(0); in reMaterializeTrivialDef()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 331 const MachineOperand &DefMO, unsigned Reg,
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| D | ARMBaseInstrInfo.cpp | 3682 const MachineOperand &DefMO = DefMI.getOperand(DefIdx); in getOperandLatency() local
3683 unsigned Reg = DefMO.getReg(); in getOperandLatency()
3705 ItinData, *ResolvedDefMI, DefIdx, ResolvedDefMI->getDesc(), DefAdj, DefMO, in getOperandLatency()
3712 const MachineOperand &DefMO, unsigned Reg, const MachineInstr &UseMI, in getOperandLatencyImpl() argument
3740 if (DefMO.isImplicit() || UseMI.getOperand(UseIdx).isImplicit()) in getOperandLatencyImpl()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 151 const MachineOperand &DefMO = DefMI.getOperand(DefIdx); in getOperandLatency() local
152 unsigned Reg = DefMO.getReg(); in getOperandLatency()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2351 const MachineOperand &DefMO = DefMI->getOperand(DefIdx); in getOperandLatency() local
2352 if (DefMO.getReg() == ARM::CPSR) { in getOperandLatency()
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