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Searched refs:DefReg (Results 1 – 19 of 19) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64RedundantCopyElimination.cpp126 unsigned DefReg = MI->getOperand(0).getReg(); in optimizeCopy() local
130 !MRI->isReserved(DefReg) && in optimizeCopy()
131 (TargetReg == DefReg || TRI->isSuperRegister(DefReg, TargetReg))) { in optimizeCopy()
140 TRI->isSubRegister(SmallestDef, DefReg) ? DefReg : SmallestDef; in optimizeCopy()
/external/llvm/lib/CodeGen/
DDetectDeadLanes.cpp256 unsigned DefReg = Def.getReg(); in transferUsedLanes() local
257 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in transferUsedLanes()
291 unsigned DefReg = Def.getReg(); in transferDefinedLanesStep() local
292 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in transferDefinedLanesStep()
294 unsigned DefRegIdx = TargetRegisterInfo::virtReg2Index(DefReg); in transferDefinedLanesStep()
434 unsigned DefReg = Def.getReg(); in determineInitialUsedLanes() local
437 if (TargetRegisterInfo::isVirtualRegister(DefReg)) { in determineInitialUsedLanes()
441 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in determineInitialUsedLanes()
476 unsigned DefReg = Def.getReg(); in isUndefInput() local
477 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) in isUndefInput()
[all …]
DTailDuplicator.cpp308 unsigned DefReg = MI->getOperand(0).getReg(); in processPHI() local
313 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in processPHI()
314 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI()
320 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg)) in processPHI()
321 addSSAUpdateEntry(DefReg, NewDef, PredBB); in processPHI()
DImplicitNullChecks.cpp495 unsigned DefReg = NoRegister; in insertFaultingLoad() local
497 DefReg = LoadMI->defs().begin()->getReg(); in insertFaultingLoad()
502 auto MIB = BuildMI(MBB, DL, TII->get(TargetOpcode::FAULTING_LOAD_OP), DefReg) in insertFaultingLoad()
DLiveVariables.cpp218 unsigned DefReg = MO.getReg(); in FindLastPartialDef() local
219 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef()
220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true); in FindLastPartialDef()
DTargetInstrInfo.cpp832 unsigned DefReg = MI.getOperand(0).getReg(); in isReallyTriviallyReMaterializableGeneric() local
838 if (TargetRegisterInfo::isVirtualRegister(DefReg) && in isReallyTriviallyReMaterializableGeneric()
839 MI.getOperand(0).getSubReg() && MI.readsVirtualRegister(DefReg)) in isReallyTriviallyReMaterializableGeneric()
889 if (MO.isDef() && Reg != DefReg) in isReallyTriviallyReMaterializableGeneric()
DPHIElimination.cpp159 unsigned DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction() local
160 if (MRI->use_nodbg_empty(DefReg)) { in runOnMachineFunction()
DTwoAddressInstructionPass.cpp199 unsigned DefReg = 0; in sink3AddrInstruction() local
215 if (DefReg) in sink3AddrInstruction()
218 DefReg = MO.getReg(); in sink3AddrInstruction()
277 if (DefReg == MOReg) in sink3AddrInstruction()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp392 unsigned DefReg = MO.getReg(); in OneUseDominatesOtherUses() local
393 if (!TargetRegisterInfo::isVirtualRegister(DefReg) || in OneUseDominatesOtherUses()
394 !MFI.isVRegStackified(DefReg)) in OneUseDominatesOtherUses()
396 assert(MRI.hasOneUse(DefReg)); in OneUseDominatesOtherUses()
397 const MachineOperand &NewUse = *MRI.use_begin(DefReg); in OneUseDominatesOtherUses()
549 unsigned DefReg = MRI.createVirtualRegister(RegClass); in MoveAndTeeForMultiUse() local
554 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in MoveAndTeeForMultiUse()
556 DefMO.setReg(DefReg); in MoveAndTeeForMultiUse()
570 LIS.createAndComputeVirtRegInterval(DefReg); in MoveAndTeeForMultiUse()
571 MFI.stackifyVReg(DefReg); in MoveAndTeeForMultiUse()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DTargetInstrInfoImpl.cpp368 unsigned DefReg = MI->getOperand(0).getReg(); in isReallyTriviallyReMaterializableGeneric() local
374 if (TargetRegisterInfo::isVirtualRegister(DefReg) && in isReallyTriviallyReMaterializableGeneric()
375 MI->getOperand(0).getSubReg() && MI->readsVirtualRegister(DefReg)) in isReallyTriviallyReMaterializableGeneric()
439 if (MO.isDef() && Reg != DefReg) in isReallyTriviallyReMaterializableGeneric()
DTailDuplication.cpp382 unsigned DefReg = MI->getOperand(0).getReg(); in ProcessPHI() local
386 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in ProcessPHI()
387 LocalVRMap.insert(std::make_pair(DefReg, SrcReg)); in ProcessPHI()
393 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg)) in ProcessPHI()
394 AddSSAUpdateEntry(DefReg, NewDef, PredBB); in ProcessPHI()
DLiveVariables.cpp214 unsigned DefReg = MO.getReg(); in FindLastPartialDef() local
215 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef()
216 PartDefRegs.insert(DefReg); in FindLastPartialDef()
217 for (const unsigned *SubRegs = TRI->getSubRegisters(DefReg); in FindLastPartialDef()
DPHIElimination.cpp135 unsigned DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction() local
136 if (MRI->use_nodbg_empty(DefReg)) in runOnMachineFunction()
DTwoAddressInstructionPass.cpp189 unsigned DefReg = 0; in Sink3AddrInstruction() local
206 if (DefReg) in Sink3AddrInstruction()
209 DefReg = MO.getReg(); in Sink3AddrInstruction()
257 if (DefReg == MOReg) in Sink3AddrInstruction()
DMachineVerifier.cpp637 unsigned DefReg = MI->getOperand(defIdx).getReg(); in visitMachineOperand() local
638 if (Reg == DefReg) in visitMachineOperand()
/external/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp665 unsigned DefReg = MI->getOperand(0).getReg(); in recordUnoptimizableWebs() local
671 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
695 unsigned DefReg = DefMI->getOperand(0).getReg(); in recordUnoptimizableWebs() local
714 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
753 unsigned DefReg = MI->getOperand(0).getReg(); in markSwapsForRemoval() local
755 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.cpp354 int DefReg = 0; in loadImmediate() local
358 DefReg = MO.getReg(); in loadImmediate()
377 if (DefReg != Reg) { in loadImmediate()
392 if (DefReg!= SpReg) { in loadImmediate()
/external/llvm/lib/Target/ARM/
DA15SDOptimizer.cpp221 unsigned DefReg = MODef.getReg(); in eraseInstrWithNoUses() local
222 if (!TRI->isVirtualRegister(DefReg)) { in eraseInstrWithNoUses()
DARMLoadStoreOptimizer.cpp840 unsigned DefReg = MO.getReg(); in MergeOpsUpdate() local
842 if (std::find(ImpDefs.begin(), ImpDefs.end(), DefReg) != ImpDefs.end()) in MergeOpsUpdate()
845 if (MI->readsRegister(DefReg)) in MergeOpsUpdate()
847 ImpDefs.push_back(DefReg); in MergeOpsUpdate()