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Searched refs:Enc (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/subzero/pnacl-llvm/include/llvm/Bitcode/NaCl/
DNaClBitCodes.h123 explicit NaClBitCodeAbbrevOp(uint64_t V) : Enc(Literal), Val(V) {} in NaClBitCodeAbbrevOp()
126 Encoding getEncoding() const { return Enc; } in getEncoding()
128 static bool isValidEncoding(uint64_t Enc) { return Enc <= Encoding_MAX; } in isValidEncoding() argument
133 return hasValue(Enc); in hasValue()
139 bool isValid() const { return isValid(Enc, Val); } in isValid()
143 bool isLiteral() const { return Enc == Literal; } in isLiteral()
145 bool isArrayOp() const { return Enc == Array; } in isArrayOp()
196 int EncodingDiff = static_cast<int>(Enc) - static_cast<int>(Op.Enc); in Compare()
205 Encoding Enc; // The encoding to use.
/external/llvm/lib/Target/Mips/
DMipsRegisterInfo.td30 class MipsReg<bits<16> Enc, string n> : Register<n> {
31 let HWEncoding = Enc;
35 class MipsRegWithSubRegs<bits<16> Enc, string n, list<Register> subregs>
37 let HWEncoding = Enc;
42 class MipsGPRReg<bits<16> Enc, string n> : MipsReg<Enc, n>;
45 class Mips64GPRReg<bits<16> Enc, string n, list<Register> subregs>
46 : MipsRegWithSubRegs<Enc, n, subregs> {
51 class FPR<bits<16> Enc, string n> : MipsReg<Enc, n>;
54 class AFPR<bits<16> Enc, string n, list<Register> subregs>
55 : MipsRegWithSubRegs<Enc, n, subregs> {
[all …]
/external/llvm/lib/Target/Sparc/
DSparcRegisterInfo.td14 class SparcReg<bits<16> Enc, string n> : Register<n> {
15 let HWEncoding = Enc;
19 class SparcCtrlReg<bits<16> Enc, string n>: Register<n> {
20 let HWEncoding = Enc;
33 class Ri<bits<16> Enc, string n> : SparcReg<Enc, n>;
36 class Rdi<bits<16> Enc, string n, list<Register> subregs> : SparcReg<Enc, n> {
42 class Rf<bits<16> Enc, string n> : SparcReg<Enc, n>;
45 class Rd<bits<16> Enc, string n, list<Register> subregs> : SparcReg<Enc, n> {
52 class Rq<bits<16> Enc, string n, list<Register> subregs> : SparcReg<Enc, n> {
/external/llvm/include/llvm/Bitcode/
DBitCodes.h90 unsigned Enc : 3; // The encoding to use. variable
102 : Val(Data), IsLiteral(false), Enc(E) {} in Val()
111 Encoding getEncoding() const { assert(isEncoding()); return (Encoding)Enc; } in getEncoding()
/external/swiftshader/third_party/LLVM/include/llvm/Bitcode/
DBitCodes.h87 unsigned Enc : 3; // The encoding to use. variable
99 : Val(Data), IsLiteral(false), Enc(E) {} in Val()
108 Encoding getEncoding() const { assert(isEncoding()); return (Encoding)Enc; } in getEncoding()
/external/swiftshader/third_party/subzero/pnacl-llvm/
DNaClBitCodes.cpp38 : Enc(E), Val(Data) { in NaClBitCodeAbbrevOp()
61 if (Enc == Literal) { in Print()
65 Stream << getEncodingName(Enc); in Print()
/external/clang/lib/CodeGen/
DTargetInfo.cpp7352 std::string Enc; member in __anondec5c0501411::FieldEncoding
7354 FieldEncoding(bool b, SmallStringEnc &e) : HasName(b), Enc(e.c_str()) {} in FieldEncoding()
7355 StringRef str() {return Enc.c_str();} in str()
7358 return Enc < rhs.Enc; in operator <()
7536 static bool getTypeString(SmallStringEnc &Enc, const Decl *D,
7542 SmallStringEnc Enc; in emitTargetMD() local
7543 if (getTypeString(Enc, D, CGM, TSC)) { in emitTargetMD()
7546 llvm::MDString::get(Ctx, Enc.str())}; in emitTargetMD()
7598 static bool appendType(SmallStringEnc &Enc, QualType QType,
7610 SmallStringEnc Enc; in extractFieldType() local
[all …]
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp286 uint32_t Enc = getLitEncoding(MO, RC.getSize()); in getMachineOpValue() local
287 if (Enc != ~0U && (Enc != 255 || Desc.getSize() == 4)) in getMachineOpValue()
288 return Enc; in getMachineOpValue()
/external/llvm/lib/Target/ARM/
DARMMCInstLower.cpp145 int32_t Enc = ARM_AM::getSOImmVal(MCOp.getImm()); in LowerARMMachineInstrToMCInst() local
146 if (Enc != -1) in LowerARMMachineInstrToMCInst()
147 MCOp.setImm(Enc); in LowerARMMachineInstrToMCInst()
DARMRegisterInfo.td15 class ARMReg<bits<16> Enc, string n, list<Register> subregs = []> : Register<n> {
16 let HWEncoding = Enc;
23 class ARMFReg<bits<16> Enc, string n> : Register<n> {
24 let HWEncoding = Enc;
/external/llvm/lib/Target/BPF/
DBPFRegisterInfo.td16 class Ri<bits<16> Enc, string n> : Register<n> {
18 let HWEncoding = Enc;
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineModuleInfo.h246 void setCompactUnwindEncoding(uint32_t Enc) { CompactUnwindEncoding = Enc; } in setCompactUnwindEncoding() argument
/external/ppp/pppd/plugins/radius/etc/
Ddictionary.microsoft13 ATTRIBUTE MS-CHAP-LM-Enc-PW 5 string Microsoft
14 ATTRIBUTE MS-CHAP-NT-Enc-PW 6 string Microsoft
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td16 class X86Reg<string n, bits<16> Enc, list<Register> subregs = []> : Register<n> {
18 let HWEncoding = Enc;
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp1863 uint32_t Enc = ARM_AM::getSOImmVal(~CE->getValue()); in addModImmNotOperands() local
1864 Inst.addOperand(MCOperand::createImm(Enc)); in addModImmNotOperands()
1870 uint32_t Enc = ARM_AM::getSOImmVal(-CE->getValue()); in addModImmNegOperands() local
1871 Inst.addOperand(MCOperand::createImm(Enc)); in addModImmNegOperands()
4492 int Enc = ARM_AM::getSOImmVal(Imm1); in parseModImm() local
4493 if (Enc != -1 && Parser.getTok().is(AsmToken::EndOfStatement)) { in parseModImm()
4495 Operands.push_back(ARMOperand::CreateModImm((Enc & 0xFF), in parseModImm()
4496 (Enc & 0xF00) >> 7, in parseModImm()
6874 unsigned Enc = Inst.getOperand(2).getImm(); in processInstruction() local
6876 ARM_AM::rotr32(Enc & 0xFF, (Enc & 0xF00) >> 7))); in processInstruction()
/external/python/cpython3/Doc/library/
Dssl.rst1367 'Enc=AESGCM(256) Mac=AEAD',
1374 'Enc=AESGCM(128) Mac=AEAD',
1386 'Enc=AESGCM(256) Mac=AEAD',
1398 'Enc=AESGCM(128) Mac=AEAD',
/external/tcpdump/tests/
Dprint-capXX.out32 0x00c0: 202a 2f2a 0d0a 4163 6365 7074 2d45 6e63 .*/*..Accept-Enc
/external/honggfuzz/examples/apache-httpd/corpus_http1/
Df7ffe5f9ed65b275614d5eed03056099.0001dd08.honggfuzz.cov794 …��PY7�g�z�����WCXRz՟�������G.�.��7:�O)��A];�� #\xT�+���Z�*6:3���T�S{�Enc E8���v��C����j(|I-v…
/external/icu/icu4c/source/data/unidata/
Dppucd.txt507 value;dt;Enc;Circle;enc
10694 block;2460..24FF;age=1.1;blk=Enclosed_Alphanum;CWKCF;dt=Enc;ea=A;gc=No;Gr_Base;lb=AI;NFKC_QC=N;NFKD…
14377 block;3200..32FF;age=1.1;blk=Enclosed_CJK;CWKCF;dt=Enc;ea=W;gc=So;Gr_Base;lb=ID;NFKC_QC=N;NFKD_QC=N…
34409 cp;1F12B;age=5.2;CWKCF;dm=0043;dt=Enc;FC_NFKC=0063;na=CIRCLED ITALIC LATIN CAPITAL LETTER C;NFKC_CF…
34410 cp;1F12C;age=5.2;CWKCF;dm=0052;dt=Enc;FC_NFKC=0072;na=CIRCLED ITALIC LATIN CAPITAL LETTER R;NFKC_CF…
34412 cp;1F12D;age=5.2;CWKCF;dm=0043 0044;dt=Enc;FC_NFKC=0063 0064;na=CIRCLED CD;NFKC_CF=0063 0064;NFKC_Q…
34413 cp;1F12E;age=5.2;CWKCF;dm=0057 005A;dt=Enc;ea=N;FC_NFKC=0077 007A;lb=AL;na=CIRCLED WZ;NFKC_CF=0077 …
34639 cp;1F250;age=6.0;dm=5F97;dt=Enc;Emoji;Emoji_Presentation;na=CIRCLED IDEOGRAPH ADVANTAGE;NFKC_CF=5F9…
34640 cp;1F251;age=6.0;dm=53EF;dt=Enc;Emoji;Emoji_Presentation;na=CIRCLED IDEOGRAPH ACCEPT;NFKC_CF=53EF;s…