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Searched refs:FNMADD (Results 1 – 17 of 17) sorted by relevance

/external/valgrind/none/tests/ppc32/
Dround.c33 FMSUB, FNMADD, FNMSUB, FSQRT enumerator
989 case FNMADD: in check_double_guarded_arithmetic_op()
1000 fC = (op == FMADD || op == FNMADD ? s : -s)*A.dbl; in check_double_guarded_arithmetic_op()
1003 z_sign = (op == FNMADD || op == FNMSUB ? -s : s); in check_double_guarded_arithmetic_op()
1127 case FNMADD: in check_double_guarded_arithmetic_op()
/external/valgrind/none/tests/ppc64/
Dround.c33 FMSUB, FNMADD, FNMSUB, FSQRT enumerator
989 case FNMADD: in check_double_guarded_arithmetic_op()
1000 fC = (op == FMADD || op == FNMADD ? s : -s)*A.dbl; in check_double_guarded_arithmetic_op()
1003 z_sign = (op == FNMADD || op == FNMSUB ? -s : s); in check_double_guarded_arithmetic_op()
1127 case FNMADD: in check_double_guarded_arithmetic_op()
/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h1509 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_128, FMA_OP_MASK, X86ISD::FNMADD, 0),
1510 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_256, FMA_OP_MASK, X86ISD::FNMADD, 0),
1511 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_512, FMA_OP_MASK, X86ISD::FNMADD,
1513 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_128, FMA_OP_MASK, X86ISD::FNMADD, 0),
1514 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_256, FMA_OP_MASK, X86ISD::FNMADD, 0),
1515 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_512, FMA_OP_MASK, X86ISD::FNMADD,
1854 X86_INTRINSIC_DATA(fma_vfnmadd_pd, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
1855 X86_INTRINSIC_DATA(fma_vfnmadd_pd_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
1856 X86_INTRINSIC_DATA(fma_vfnmadd_ps, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
1857 X86_INTRINSIC_DATA(fma_vfnmadd_ps_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
DX86ISelLowering.h475 FNMADD, enumerator
DX86InstrFragmentsSIMD.td470 def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
DX86ISelLowering.cpp22286 case X86ISD::FNMADD: return "X86ISD::FNMADD"; in getTargetNodeName()
29763 return DAG.getNode(X86ISD::FNMADD, DL, VT, Arg.getOperand(0), in combineFneg()
29765 case X86ISD::FNMADD: in combineFneg()
30231 Opcode = (!NegC) ? X86ISD::FNMADD : X86ISD::FNMSUB; in combineFMA()
/external/valgrind/
DREADME.aarch64146 FMADD/FMSUB/FNMADD/FNMSUB: generate and use the relevant fused
/external/v8/src/arm64/
Ddisasm-arm64.cc1052 FORMAT(FNMADD, "fnmadd"); in VisitFPDataProcessing3Source()
/external/v8/src/ppc/
Dconstants-ppc.h1831 V(fnmadd, FNMADD, 0xFC00003E) \
/external/vixl/src/aarch64/
Ddisasm-aarch64.cc1541 FORMAT(FNMADD, "fnmadd"); in VisitFPDataProcessing3Source()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrInfo.td1249 def FNMADD : AForm_1<63, 31,
/external/capstone/arch/PowerPC/
DPPCGenAsmWriter.inc544 18704U, // FNMADD
1817 40U, // FNMADD
4016 // FMADD, FMADDS, FMADDSo, FMADDo, FMSUB, FMSUBS, FMSUBSo, FMSUBo, FNMADD...
DPPCGenDisassemblerTables.inc2231 /* 9360 */ MCD_OPC_Decode, 140, 4, 112, // Opcode: FNMADD
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md2238 ### FNMADD ### subsection
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2635 defm FNMADD : ThreeOperandFPData<1, 0, "fnmadd",
2651 // We handled -(a + b*c) for FNMADD above, now it's time for "(-a) + (-b)*c" and
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td2549 defm FNMADD : AForm_1r<63, 31,
/external/capstone/arch/AArch64/
DAArch64GenAsmWriter.inc6416 // EXTRWrri, EXTRXrri, FMADDDrrr, FMADDSrrr, FMSUBDrrr, FMSUBSrrr, FNMADD...