| /external/llvm/test/CodeGen/X86/ |
| D | frem-msvc32.ll | 1 ; Make sure that 32-bit FREM is promoted to 64-bit FREM on 32-bit MSVC.
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| /external/javassist/src/main/javassist/bytecode/ |
| D | Opcode.java | 103 int FREM = 114; field
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| /external/annotation-tools/asmx/core/org/objectweb/asm/ |
| D | Opcodes.class | <Unknown>
package org.objectweb.asm
public abstract org.objectweb.asm.Opcodes extends ... |
| /external/annotation-tools/asmx/src/org/objectweb/asm/ |
| D | Opcodes.java | 273 int FREM = 114; // - field
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 235 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 241 FADD, FSUB, FMUL, FDIV, FREM, enumerator
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetTransformInfo.cpp | 175 case ISD::FREM: in getArithmeticInstrCost()
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| D | AMDGPUISelLowering.cpp | 255 setOperationAction(ISD::FREM, MVT::f32, Custom); in AMDGPUTargetLowering()
256 setOperationAction(ISD::FREM, MVT::f64, Custom); in AMDGPUTargetLowering()
416 setOperationAction(ISD::FREM, VT, Expand); in AMDGPUTargetLowering()
712 case ISD::FREM: return LowerFREM(Op, DAG); in LowerOperation()
|
| /external/annotation-tools/asmx/src/org/objectweb/asm/tree/analysis/ |
| D | BasicInterpreter.java | 260 case FREM: in binaryOperation()
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| D | BasicVerifier.java | 254 case FREM: in binaryOperation()
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| D | Frame.java | 445 case Opcodes.FREM: in execute()
|
| /external/annotation-tools/asmx/src/org/objectweb/asm/commons/ |
| D | AdviceAdapter.java | 192 case FREM: in visitInsn()
|
| /external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/flow/ |
| D | LabelFlowAnalyzerTest.java | 206 testInsn(FREM, true); in testInsn()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 150 case ISD::FREM: in LegalizeOp()
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| D | SelectionDAGBuilder.h | 486 void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } in visitFRem()
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 144 setOperationAction(ISD::FREM, MVT::f32, Expand); in SystemZTargetLowering()
145 setOperationAction(ISD::FREM, MVT::f64, Expand); in SystemZTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 80 setOperationAction(ISD::FREM, MVT::f32, Expand); in AlphaTargetLowering()
81 setOperationAction(ISD::FREM, MVT::f64, Expand); in AlphaTargetLowering()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 202 case ISD::FREM: return "frem"; in getOperationName()
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| D | SelectionDAGBuilder.h | 837 void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } in visitFRem()
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| D | LegalizeFloatTypes.cpp | 99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break; in SoftenFloatResult()
1046 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break; in ExpandFloatResult()
1895 case ISD::FREM: in PromoteFloatResult()
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| /external/annotation-tools/asmx/test/conform/org/objectweb/asm/commons/ |
| D | GASMifierMethodVisitor.java | 302 case FREM: in visitInsn()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 82 ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 758 setOperationAction(ISD::FREM , MVT::f64, Expand); in SparcTargetLowering()
762 setOperationAction(ISD::FREM , MVT::f32, Expand); in SparcTargetLowering()
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| /external/desugar/java/com/google/devtools/build/android/desugar/ |
| D | BytecodeTypeInference.java | 315 case Opcodes.FREM: in visitInsn()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 967 case ISD::FREM: in canOpTrap()
1683 case FRem: return ISD::FREM; in InstructionOpcodeToISD()
|