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Searched refs:HInstr (Results 1 – 19 of 19) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_generic_regs.h342 typedef void HInstr; typedef
352 HInstr** arr;
364 extern void addHInstr_SLOW ( HInstrArray*, HInstr* );
366 static inline void addHInstr ( HInstrArray* ha, HInstr* instr ) in addHInstr()
458 Bool (*isMove) (const HInstr*, HReg*, HReg*),
461 void (*getRegUsage) (HRegUsage*, const HInstr*, Bool),
464 void (*mapRegs) (HRegRemap*, HInstr*, Bool),
468 void (*genSpill) ( HInstr**, HInstr**, HReg, Int, Bool ),
469 void (*genReload) ( HInstr**, HInstr**, HReg, Int, Bool ),
470 HInstr* (*directReload) ( HInstr*, HReg, Short ),
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Dhost_generic_reg_alloc2.c367 Bool (*isMove) ( const HInstr*, HReg*, HReg* ), in doRegisterAllocation() argument
370 void (*getRegUsage) ( HRegUsage*, const HInstr*, Bool ), in doRegisterAllocation()
373 void (*mapRegs) ( HRegRemap*, HInstr*, Bool ), in doRegisterAllocation()
382 void (*genSpill) ( HInstr**, HInstr**, HReg, Int, Bool ), in doRegisterAllocation()
383 void (*genReload) ( HInstr**, HInstr**, HReg, Int, Bool ), in doRegisterAllocation()
384 HInstr* (*directReload) ( HInstr*, HReg, Short ), in doRegisterAllocation()
388 void (*ppInstr) ( const HInstr*, Bool ), in doRegisterAllocation()
463 HInstr* _tmp = (_instr); \ in doRegisterAllocation()
1225 HInstr* spill1 = NULL; in doRegisterAllocation()
1226 HInstr* spill2 = NULL; in doRegisterAllocation()
[all …]
Dhost_generic_regs.c290 ha->arr = LibVEX_Alloc_inline(ha->arr_size * sizeof(HInstr*)); in newHInstrArray()
296 void addHInstr_SLOW ( HInstrArray* ha, HInstr* instr ) in addHInstr_SLOW()
300 HInstr** arr2 = LibVEX_Alloc_inline(ha->arr_size * 2 * sizeof(HInstr*)); in addHInstr_SLOW()
Dmain_main.c710 Bool (*isMove) ( const HInstr*, HReg*, HReg* ); in libvex_BackEnd()
711 void (*getRegUsage) ( HRegUsage*, const HInstr*, Bool ); in libvex_BackEnd()
712 void (*mapRegs) ( HRegRemap*, HInstr*, Bool ); in libvex_BackEnd()
713 void (*genSpill) ( HInstr**, HInstr**, HReg, Int, Bool ); in libvex_BackEnd()
714 void (*genReload) ( HInstr**, HInstr**, HReg, Int, Bool ); in libvex_BackEnd()
715 HInstr* (*directReload) ( HInstr*, HReg, Short ); in libvex_BackEnd()
716 void (*ppInstr) ( const HInstr*, Bool ); in libvex_BackEnd()
722 UChar*, Int, const HInstr*, Bool, VexEndness, in libvex_BackEnd()
1107 HInstr* hi = rcode->arr[i]; in libvex_BackEnd()
Dhost_x86_defs.h729 extern void genSpill_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
731 extern void genReload_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
Dhost_amd64_defs.h800 extern void genSpill_AMD64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
802 extern void genReload_AMD64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
Dhost_s390_defs.h750 void genSpill_S390 ( HInstr **, HInstr **, HReg , Int , Bool );
751 void genReload_S390 ( HInstr **, HInstr **, HReg , Int , Bool );
Dhost_mips_defs.h699 extern void genSpill_MIPS ( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2,
701 extern void genReload_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2,
Dhost_arm_defs.h1069 extern void genSpill_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
1071 extern void genReload_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
Dhost_arm64_defs.h1006 extern void genSpill_ARM64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
1008 extern void genReload_ARM64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
Dhost_ppc_defs.h1214 extern void genSpill_PPC ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
1216 extern void genReload_PPC ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
Dhost_x86_defs.c1705 void genSpill_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genSpill_X86()
1730 void genReload_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genReload_X86()
Dhost_mips_defs.c1968 void genSpill_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg, in genSpill_MIPS()
2000 void genReload_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg, in genReload_MIPS()
Dhost_amd64_defs.c1954 void genSpill_AMD64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genSpill_AMD64()
1976 void genReload_AMD64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genReload_AMD64()
Dhost_arm_defs.c2665 void genSpill_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genSpill_ARM()
2720 void genReload_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genReload_ARM()
Dhost_arm64_defs.c2537 void genSpill_ARM64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genSpill_ARM64()
2578 void genReload_ARM64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genReload_ARM64()
Dhost_ppc_defs.c3154 void genSpill_PPC ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genSpill_PPC()
3184 void genReload_PPC ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, in genReload_PPC()
Dhost_s390_defs.c470 genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) in genSpill_S390()
496 genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) in genReload_S390()
/external/v8/src/crankshaft/
Dhydrogen-instructions.cc3306 #define DEFINE_NEW_H_SIMPLE_ARITHMETIC_INSTR(HInstr, op) \ argument
3307 HInstruction* HInstr::New(Isolate* isolate, Zone* zone, HValue* context, \
3320 return new (zone) HInstr(context, left, right); \
3634 #define DEFINE_NEW_H_BITWISE_INSTR(HInstr, result) \ argument
3635 HInstruction* HInstr::New(Isolate* isolate, Zone* zone, HValue* context, \
3644 return new (zone) HInstr(context, left, right); \