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Searched refs:HRcInt64 (Results 1 – 16 of 16) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_amd64_defs.h50 ST_IN HReg hregAMD64_RSI ( void ) { return mkHReg(False, HRcInt64, 6, 0); } in hregAMD64_RSI()
51 ST_IN HReg hregAMD64_RDI ( void ) { return mkHReg(False, HRcInt64, 7, 1); } in hregAMD64_RDI()
52 ST_IN HReg hregAMD64_R8 ( void ) { return mkHReg(False, HRcInt64, 8, 2); } in hregAMD64_R8()
53 ST_IN HReg hregAMD64_R9 ( void ) { return mkHReg(False, HRcInt64, 9, 3); } in hregAMD64_R9()
54 ST_IN HReg hregAMD64_R12 ( void ) { return mkHReg(False, HRcInt64, 12, 4); } in hregAMD64_R12()
55 ST_IN HReg hregAMD64_R13 ( void ) { return mkHReg(False, HRcInt64, 13, 5); } in hregAMD64_R13()
56 ST_IN HReg hregAMD64_R14 ( void ) { return mkHReg(False, HRcInt64, 14, 6); } in hregAMD64_R14()
57 ST_IN HReg hregAMD64_R15 ( void ) { return mkHReg(False, HRcInt64, 15, 7); } in hregAMD64_R15()
58 ST_IN HReg hregAMD64_RBX ( void ) { return mkHReg(False, HRcInt64, 3, 8); } in hregAMD64_RBX()
71 ST_IN HReg hregAMD64_R10 ( void ) { return mkHReg(False, HRcInt64, 10, 19); } in hregAMD64_R10()
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Dhost_arm64_defs.h42 ST_IN HReg hregARM64_X22 ( void ) { return mkHReg(False, HRcInt64, 22, 0); } in hregARM64_X22()
43 ST_IN HReg hregARM64_X23 ( void ) { return mkHReg(False, HRcInt64, 23, 1); } in hregARM64_X23()
44 ST_IN HReg hregARM64_X24 ( void ) { return mkHReg(False, HRcInt64, 24, 2); } in hregARM64_X24()
45 ST_IN HReg hregARM64_X25 ( void ) { return mkHReg(False, HRcInt64, 25, 3); } in hregARM64_X25()
46 ST_IN HReg hregARM64_X26 ( void ) { return mkHReg(False, HRcInt64, 26, 4); } in hregARM64_X26()
47 ST_IN HReg hregARM64_X27 ( void ) { return mkHReg(False, HRcInt64, 27, 5); } in hregARM64_X27()
48 ST_IN HReg hregARM64_X28 ( void ) { return mkHReg(False, HRcInt64, 28, 6); } in hregARM64_X28()
50 ST_IN HReg hregARM64_X0 ( void ) { return mkHReg(False, HRcInt64, 0, 7); } in hregARM64_X0()
51 ST_IN HReg hregARM64_X1 ( void ) { return mkHReg(False, HRcInt64, 1, 8); } in hregARM64_X1()
52 ST_IN HReg hregARM64_X2 ( void ) { return mkHReg(False, HRcInt64, 2, 9); } in hregARM64_X2()
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Dhost_generic_regs.c51 case HRcInt64: vex_printf("HRcInt64"); break; in ppHRegClass()
75 case HRcInt64: vex_printf("%%%sR%u", maybe_v, regNN); return; in ppHReg()
Dhost_generic_regs.h117 HRcInt64=4, /* 64-bit int */ enumerator
Dhost_arm64_isel.c143 HReg reg = mkHReg(True/*virtual reg*/, HRcInt64, 0, env->vreg_ctr); in newVRegI()
816 toBool( hregClass(am->ARM64am.RI9.reg) == HRcInt64 in sane_AMode()
824 toBool( hregClass(am->ARM64am.RI12.reg) == HRcInt64 in sane_AMode()
832 toBool( hregClass(am->ARM64am.RR.base) == HRcInt64 in sane_AMode()
834 && hregClass(am->ARM64am.RR.index) == HRcInt64 in sane_AMode()
927 vassert(hregClass(ri->ARM64riA.R.reg) == HRcInt64); in iselIntExpr_RIA()
1191 vassert(hregClass(ri->ARM64riL.R.reg) == HRcInt64); in iselIntExpr_RIL()
1250 vassert(hregClass(ri->ARM64ri6.R.reg) == HRcInt64); in iselIntExpr_RI6()
1465 vassert(hregClass(r) == HRcInt64); in iselIntExpr_R()
2104 vassert(hregClass(*rHi) == HRcInt64); in iselInt128Expr()
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Dhost_amd64_isel.c196 HReg reg = mkHReg(True/*virtual reg*/, HRcInt64, 0/*enc*/, env->vreg_ctr); in newVRegI()
266 toBool( hregClass(am->Aam.IR.reg) == HRcInt64 in sane_AMode()
271 toBool( hregClass(am->Aam.IRRS.base) == HRcInt64 in sane_AMode()
273 && hregClass(am->Aam.IRRS.index) == HRcInt64 in sane_AMode()
312 vassert(hregClass(src) == HRcInt64); in mk_iMOVsd_RR()
313 vassert(hregClass(dst) == HRcInt64); in mk_iMOVsd_RR()
906 vassert(hregClass(r) == HRcInt64); in iselIntExpr_R()
2034 vassert(hregClass(rmi->Armi.Reg.reg) == HRcInt64); in iselIntExpr_RMI()
2106 vassert(hregClass(ri->Ari.Reg.reg) == HRcInt64); in iselIntExpr_RI()
2160 vassert(hregClass(rm->Arm.Reg.reg) == HRcInt64); in iselIntExpr_RM()
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Dhost_amd64_defs.c117 case HRcInt64: in ppHRegAMD64()
146 case HRcInt64: in ppHRegAMD64_lo32()
1964 case HRcInt64: in genSpill_AMD64()
1986 case HRcInt64: in genReload_AMD64()
2042 vassert(hregClass(r) == HRcInt64); in iregEnc210()
2053 vassert(hregClass(r) == HRcInt64); in iregEnc3()
2064 vassert(hregClass(r) == HRcInt64); in iregEnc3210()
Dhost_mips_isel.c59 #define HRcGPR(_mode64) ((_mode64) ? HRcInt64 : HRcInt32)
323 vassert(hregClass(r_src) == HRcInt32 || hregClass(r_src) == HRcInt64); in mk_iMOVds_RR()
4231 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
4239 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
4248 hreg = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
4249 hregHI = mkHReg(True, HRcInt64, 0, j++); in iselSB_MIPS()
Dhost_mips_defs.h44 mkHReg(False, (_mode64) ? HRcInt64 : HRcInt32, \
Dhost_mips_defs.c159 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 || in ppHRegMIPS()
169 case HRcInt64: in ppHRegMIPS()
1978 case HRcInt64: in genSpill_MIPS()
2008 case HRcInt64: in genReload_MIPS()
2037 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregNo()
Dhost_s390_isel.c222 return mkHReg(/*virtual*/True, HRcInt64, /*encoding*/0, ix); in mkVRegI()
1056 vassert(hregClass(*dst_hi) == HRcInt64); in s390_isel_int128_expr()
1057 vassert(hregClass(*dst_lo) == HRcInt64); in s390_isel_int128_expr()
1897 vassert(hregClass(dst) == HRcInt64); in s390_isel_int_expr()
Dhost_arm64_defs.c154 case HRcInt64: in ppHRegARM64()
877 vassert(hregClass(src) == HRcInt64); in ARM64Instr_MovI()
878 vassert(hregClass(dst) == HRcInt64); in ARM64Instr_MovI()
2547 case HRcInt64: in genSpill_ARM64()
2588 case HRcInt64: in genReload_ARM64()
2627 vassert(hregClass(r) == HRcInt64); in iregEnc()
Dhost_ppc_isel.c48 #define HRcGPR(_mode64) ((_mode64) ? HRcInt64 : HRcInt32)
521 hregClass(r_src) == HRcInt64); in mk_iMOVds_RR()
599 vassert(hregClass(r_src) == HRcInt64); in mk_LoadR64toFPR()
6915 hregLo = mkHReg(True, HRcInt64, 0, j++); in iselSB_PPC()
6922 hregLo = mkHReg(True, HRcInt64, 0, j++); in iselSB_PPC()
6930 hregLo = mkHReg(True, HRcInt64, 0, j++); in iselSB_PPC()
6931 hregMedLo = mkHReg(True, HRcInt64, 0, j++); in iselSB_PPC()
Dhost_s390_defs.c70 return mkHReg(/*virtual*/False, HRcInt64, regno, ix); in s390_hreg_gpr()
111 case HRcInt64: vex_sprintf(buf, "%%vR%u", r); break; in s390_hreg_as_string()
122 case HRcInt64: return ireg_names[r]; in s390_hreg_as_string()
285 return hregIsVirtual(reg) && hregClass(reg) == HRcInt64; in is_virtual_gpr()
482 case HRcInt64: in genSpill_S390()
508 case HRcInt64: in genReload_S390()
7279 if (dst_class == HRcInt64) in s390_insn_move_emit()
7284 if (dst_class == HRcFlt64 && src_class == HRcInt64) { in s390_insn_move_emit()
7292 if (dst_class == HRcInt64 && src_class == HRcFlt64) { in s390_insn_move_emit()
Dhost_ppc_defs.h49 mkHReg(False, (_mode64) ? HRcInt64 : HRcInt32, \
Dhost_ppc_defs.c168 case HRcInt64: in ppHRegPPC()
3162 case HRcInt64: in genSpill_PPC()
3192 case HRcInt64: in genReload_PPC()
3219 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregEnc()