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Searched refs:Hardware (Results 1 – 25 of 81) sorted by relevance

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/external/valgrind/gdbserver_tests/
Dmcwatchpoints.stdoutB.exp5 Hardware read watchpoint 2: undefined[0]
6 Hardware access (read/write) watchpoint 3: undefined[4]
7 Hardware watchpoint 4: undefined[8]
8 Hardware read watchpoint 5: undefined[9]
9 Hardware access (read/write) watchpoint 6: undefined[9]
10 Hardware watchpoint 7: undefined[9]
12 Hardware read watchpoint 2: undefined[0]
17 Hardware access (read/write) watchpoint 3: undefined[4]
22 Hardware access (read/write) watchpoint 3: undefined[4]
28 Hardware watchpoint 4: undefined[8]
Dmcclean_after_fork.stdoutB.exp7 Hardware read watchpoint 4: mem
9 Hardware read watchpoint 4: mem
/external/skqp/tools/skpbench/
D_hardware_android.py7 from _hardware import Hardware
11 class HardwareAndroid(Hardware):
13 Hardware.__init__(self)
21 Hardware.__enter__(self)
61 Hardware.__exit__(self, exception_type, exception_value, traceback)
65 Hardware.sanity_check(self)
94 Hardware.print_debug_diagnostics(self)
/external/skia/tools/skpbench/
D_hardware_android.py7 from _hardware import Hardware
11 class HardwareAndroid(Hardware):
13 Hardware.__init__(self)
21 Hardware.__enter__(self)
61 Hardware.__exit__(self, exception_type, exception_value, traceback)
65 Hardware.sanity_check(self)
94 Hardware.print_debug_diagnostics(self)
/external/libese/tools/ese_replay/
Dhw.h25 struct Hardware { struct
34 const struct Hardware hw[]; argument
37 bool initialize_hardware(struct EseInterface *ese, const struct Hardware *hw);
38 void release_hardware(const struct Hardware *hw);
Dhw.c49 void release_hardware(const struct Hardware *hw) { in release_hardware()
56 bool initialize_hardware(struct EseInterface *ese, const struct Hardware *hw) { in initialize_hardware()
/external/ltp/testcases/kdump/doc/
D00_Descriptions.txt26 using the Hardware Management Console via soft reset.
60 the Hardware Management Console via soft reset.
62 While executing some loop testcases after invoking a dump via Hardware
69 In such case you will have to re-trigger dump via Hardware Management Console
/external/tcpdump/tests/
Darp-too-long-tha.out1 ARP, Unknown Hardware (12336) (len 14), IPv4 (len 4), Request who-has 48.48.48.48 (30:30:30:30:30:3…
Dgetname_2_read4_asan.out1 ARP, Unknown Hardware (65280) (len 0), Unknown Protocol (0x8b01) (len 0), Reverse Reply <empty> at …
/external/libyuv/files/unit_test/testdata/
Darm_v7.txt10 Hardware : OLPC XO-1.75
Dtegra3.txt21 Hardware : cardhu
Djuno.txt15 Hardware : Juno
/external/nos/test/system-test-harness/
DREADME.md12 * Hardware
/external/autotest/client/site_tests/suite_HWQual/
Dcontrol.keyboard6 TEST_CLASS = 'Hardware'
/external/autotest/client/site_tests/hardware_TPMtspi/
Dcontrol11 TEST_CLASS = "Hardware"
/external/autotest/client/site_tests/hardware_Keyboard/
Dcontrol6 TEST_CLASS = 'Hardware'
/external/autotest/client/site_tests/hardware_TPMTakeOwnership/
Dcontrol11 TEST_CLASS = "Hardware"
/external/autotest/client/site_tests/hardware_TPMLoadKey/
Dcontrol11 TEST_CLASS = "Hardware"
/external/autotest/client/tests/spew/
Dcontrol5 TEST_CLASS='Hardware'
/external/autotest/client/site_tests/hardware_TPMCheck/
Dcontrol12 TEST_CLASS = "Hardware"
/external/autotest/client/site_tests/hardware_TPMttci/
Dcontrol11 TEST_CLASS = "Hardware"
/external/llvm/lib/Target/PowerPC/
DPPCInstrHTM.td1 //===-- PPCInstrHTM.td - The PowerPC Hardware Transactional Memory -*-===//
10 // This file describes the Hardware Transactional Memory extension to the
/external/autotest/client/tests/disktest/
Dcontrol19 TEST_CLASS = 'Hardware'
/external/autotest/client/site_tests/firmware_TouchMTB/
Dcontrol10 TEST_CLASS = 'Hardware'
/external/autotest/client/site_tests/power_CheckAfterSuspend/
Dcontrol.per_build12 TEST_CLASS = "Hardware"

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