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Searched refs:Iend_BE (Results 1 – 14 of 14) sorted by relevance

/external/valgrind/VEX/priv/
Dguest_mips_defs.h100 #define MIPS_IEND Iend_BE
Dir_inject.c107 if (endian == Iend_BE) { in load()
172 if (endian == Iend_BE) { in store()
Dhost_s390_isel.c1105 if (expr->Iex.Load.end != Iend_BE) in s390_isel_int_expr_wrk()
1967 if (expr->Iex.Load.end != Iend_BE) in s390_isel_float128_expr_wrk()
2299 if (expr->Iex.Load.end != Iend_BE) in s390_isel_float_expr_wrk()
2656 if (expr->Iex.Load.end != Iend_BE) in s390_isel_dfp128_expr_wrk()
2994 if (expr->Iex.Load.end != Iend_BE) in s390_isel_dfp_expr_wrk()
3527 if (stmt->Ist.Store.end != Iend_BE) goto stmt_fail; in s390_isel_stmt()
3671 if (stmt->Ist.Put.data->Iex.Load.end != Iend_BE) goto stmt_fail; in s390_isel_stmt()
Dir_defs.c1887 vassert(end == Iend_LE || end == Iend_BE); in IRExpr_Load()
2183 vassert(end == Iend_LE || end == Iend_BE); in IRStmt_Store()
2191 vassert(end == Iend_LE || end == Iend_BE); in IRStmt_StoreG()
4302 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE) in tcExpr()
4403 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE) in tcStmt()
4417 if (sg->end != Iend_LE && sg->end != Iend_BE) in tcStmt()
4494 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE) in tcStmt()
Dguest_s390_toIR.c241 stmt(IRStmt_Store(Iend_BE, addr, data)); in store()
249 return IRExpr_Load(Iend_BE, type, addr); in load()
5673 Iend_BE, mkexpr(op2addr), in s390_irgen_load_and_add32()
5707 Iend_BE, mkexpr(op2addr), in s390_irgen_load_and_add64()
5741 Iend_BE, mkexpr(op2addr), in s390_irgen_load_and_bitwise32()
5771 Iend_BE, mkexpr(op2addr), in s390_irgen_load_and_bitwise64()
12020 Iend_BE, mkexpr(op2addr), in s390_irgen_cas_32()
12068 Iend_BE, mkexpr(op2addr), in s390_irgen_CSG()
12108 Iend_BE, mkexpr(op2addr), in s390_irgen_cdas_32()
12168 Iend_BE, mkexpr(op2addr), in s390_irgen_CDSG()
[all …]
Dguest_mips_toIR.c909 load1 = IRExpr_Load(Iend_BE, ty, addr); in load()
930 stmt(IRStmt_Store(Iend_BE, addr, data)); in store()
2246 Iend_BE, mkexpr(op1addr), in mips_load_store32()
2270 Iend_BE, mkexpr(op1addr), in mips_load_store64()
12224 vex_inject_ir(irsb, Iend_BE); in disInstr_MIPS_WRK()
Dhost_mips_isel.c807 && e->Iex.Load.end != Iend_BE) in iselWordExpr_R_wrk()
Dguest_ppc_toIR.c613 stmt( IRStmt_Store(Iend_BE, addr, data) ); in store()
676 return IRExpr_Load(Iend_BE, ty, addr); in load()
685 return IRStmt_LLSC(Iend_BE, result, addr, storedata); in stmt_load()
27898 vex_inject_ir(irsb, Iend_BE); in disInstr_PPC_WRK()
Dhost_ppc_isel.c6863 IEndianess = Iend_BE; in iselSB_PPC()
/external/valgrind/VEX/pub/
Dlibvex_ir.h257 Iend_BE /* big endian */ enumerator
/external/valgrind/exp-dhat/
Ddh_main.c775 # define END Iend_BE in add_counter_update()
/external/valgrind/memcheck/
Dmc_translate.c4708 tl_assert(end == Iend_LE || end == Iend_BE); in expr2vbits_Load_WRK()
4842 tl_assert(end == Iend_LE || end == Iend_BE); in expr2vbits_Load()
5112 tl_assert( end == Iend_LE || end == Iend_BE ); in do_shadow_Store()
5373 end = Iend_BE; in do_shadow_Dirty()
6001 tl_assert(cas->end == Iend_BE); in do_shadow_CAS_double()
/external/valgrind/massif/
Dms_main.c1657 # define END Iend_BE in add_counter_update()
/external/valgrind/callgrind/
Dmain.c830 # define CLGEndness Iend_BE