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/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-memop-immediate-512-ldrsb-a32.h37 const Inputs kOutputs_Ldrsb_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Ldrsb_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Ldrsb_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Ldrsb_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Ldrsb_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Ldrsb_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Ldrsb_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Ldrsb_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Ldrsb_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Ldrsb_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to32-ldrb-a32.h37 const Inputs kOutputs_Ldrb_Condition_eq_r0_r1_plus_r8_LSR_1_Offset[] = {
54 const Inputs kOutputs_Ldrb_Condition_ne_r0_r1_plus_r8_LSR_1_Offset[] = {
71 const Inputs kOutputs_Ldrb_Condition_cs_r0_r1_plus_r8_LSR_1_Offset[] = {
88 const Inputs kOutputs_Ldrb_Condition_cc_r0_r1_plus_r8_LSR_1_Offset[] = {
105 const Inputs kOutputs_Ldrb_Condition_mi_r0_r1_plus_r8_LSR_1_Offset[] = {
122 const Inputs kOutputs_Ldrb_Condition_pl_r0_r1_plus_r8_LSR_1_Offset[] = {
139 const Inputs kOutputs_Ldrb_Condition_vs_r0_r1_plus_r8_LSR_1_Offset[] = {
156 const Inputs kOutputs_Ldrb_Condition_vc_r0_r1_plus_r8_LSR_1_Offset[] = {
173 const Inputs kOutputs_Ldrb_Condition_hi_r0_r1_plus_r8_LSR_1_Offset[] = {
190 const Inputs kOutputs_Ldrb_Condition_ls_r0_r1_plus_r8_LSR_1_Offset[] = {
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Dsimulator-cond-rd-memop-rs-ldrsb-a32.h37 const Inputs kOutputs_Ldrsb_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Ldrsb_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Ldrsb_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Ldrsb_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Ldrsb_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Ldrsb_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Ldrsb_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Ldrsb_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Ldrsb_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Ldrsb_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-rs-strb-a32.h37 const Inputs kOutputs_Strb_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Strb_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Strb_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Strb_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Strb_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Strb_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Strb_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Strb_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Strb_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Strb_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-8192-strb-a32.h37 const Inputs kOutputs_Strb_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Strb_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Strb_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Strb_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Strb_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Strb_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Strb_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Strb_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Strb_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Strb_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-8192-ldrb-a32.h37 const Inputs kOutputs_Ldrb_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Ldrb_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Ldrb_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Ldrb_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Ldrb_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Ldrb_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Ldrb_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Ldrb_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Ldrb_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Ldrb_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-rs-ldrh-a32.h37 const Inputs kOutputs_Ldrh_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Ldrh_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Ldrh_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Ldrh_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Ldrh_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Ldrh_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Ldrh_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Ldrh_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Ldrh_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Ldrh_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to31-ldrb-a32.h37 const Inputs kOutputs_Ldrb_Condition_eq_r0_r1_plus_r8_LSL_1_Offset[] = {
54 const Inputs kOutputs_Ldrb_Condition_ne_r0_r1_plus_r8_LSL_1_Offset[] = {
71 const Inputs kOutputs_Ldrb_Condition_cs_r0_r1_plus_r8_LSL_1_Offset[] = {
88 const Inputs kOutputs_Ldrb_Condition_cc_r0_r1_plus_r8_LSL_1_Offset[] = {
105 const Inputs kOutputs_Ldrb_Condition_mi_r0_r1_plus_r8_LSL_1_Offset[] = {
122 const Inputs kOutputs_Ldrb_Condition_pl_r0_r1_plus_r8_LSL_1_Offset[] = {
139 const Inputs kOutputs_Ldrb_Condition_vs_r0_r1_plus_r8_LSL_1_Offset[] = {
156 const Inputs kOutputs_Ldrb_Condition_vc_r0_r1_plus_r8_LSL_1_Offset[] = {
173 const Inputs kOutputs_Ldrb_Condition_hi_r0_r1_plus_r8_LSL_1_Offset[] = {
190 const Inputs kOutputs_Ldrb_Condition_ls_r0_r1_plus_r8_LSL_1_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to31-ldr-a32.h37 const Inputs kOutputs_Ldr_Condition_eq_r0_r1_plus_r8_LSL_1_Offset[] = {
54 const Inputs kOutputs_Ldr_Condition_ne_r0_r1_plus_r8_LSL_1_Offset[] = {
71 const Inputs kOutputs_Ldr_Condition_cs_r0_r1_plus_r8_LSL_1_Offset[] = {
88 const Inputs kOutputs_Ldr_Condition_cc_r0_r1_plus_r8_LSL_1_Offset[] = {
105 const Inputs kOutputs_Ldr_Condition_mi_r0_r1_plus_r8_LSL_1_Offset[] = {
122 const Inputs kOutputs_Ldr_Condition_pl_r0_r1_plus_r8_LSL_1_Offset[] = {
139 const Inputs kOutputs_Ldr_Condition_vs_r0_r1_plus_r8_LSL_1_Offset[] = {
156 const Inputs kOutputs_Ldr_Condition_vc_r0_r1_plus_r8_LSL_1_Offset[] = {
173 const Inputs kOutputs_Ldr_Condition_hi_r0_r1_plus_r8_LSL_1_Offset[] = {
190 const Inputs kOutputs_Ldr_Condition_ls_r0_r1_plus_r8_LSL_1_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to31-str-a32.h37 const Inputs kOutputs_Str_Condition_eq_r0_r1_plus_r8_LSL_1_Offset[] = {
54 const Inputs kOutputs_Str_Condition_ne_r0_r1_plus_r8_LSL_1_Offset[] = {
71 const Inputs kOutputs_Str_Condition_cs_r0_r1_plus_r8_LSL_1_Offset[] = {
88 const Inputs kOutputs_Str_Condition_cc_r0_r1_plus_r8_LSL_1_Offset[] = {
105 const Inputs kOutputs_Str_Condition_mi_r0_r1_plus_r8_LSL_1_Offset[] = {
122 const Inputs kOutputs_Str_Condition_pl_r0_r1_plus_r8_LSL_1_Offset[] = {
139 const Inputs kOutputs_Str_Condition_vs_r0_r1_plus_r8_LSL_1_Offset[] = {
156 const Inputs kOutputs_Str_Condition_vc_r0_r1_plus_r8_LSL_1_Offset[] = {
173 const Inputs kOutputs_Str_Condition_hi_r0_r1_plus_r8_LSL_1_Offset[] = {
190 const Inputs kOutputs_Str_Condition_ls_r0_r1_plus_r8_LSL_1_Offset[] = {
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Dsimulator-cond-rd-memop-rs-str-a32.h37 const Inputs kOutputs_Str_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Str_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Str_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Str_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Str_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Str_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Str_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Str_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Str_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Str_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-rs-ldrb-a32.h37 const Inputs kOutputs_Ldrb_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Ldrb_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Ldrb_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Ldrb_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Ldrb_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Ldrb_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Ldrb_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Ldrb_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Ldrb_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Ldrb_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-rs-ldrsh-a32.h37 const Inputs kOutputs_Ldrsh_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Ldrsh_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Ldrsh_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Ldrsh_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Ldrsh_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Ldrsh_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Ldrsh_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Ldrsh_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Ldrsh_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Ldrsh_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to32-ldr-a32.h37 const Inputs kOutputs_Ldr_Condition_eq_r0_r1_plus_r8_LSR_1_Offset[] = {
54 const Inputs kOutputs_Ldr_Condition_ne_r0_r1_plus_r8_LSR_1_Offset[] = {
71 const Inputs kOutputs_Ldr_Condition_cs_r0_r1_plus_r8_LSR_1_Offset[] = {
88 const Inputs kOutputs_Ldr_Condition_cc_r0_r1_plus_r8_LSR_1_Offset[] = {
105 const Inputs kOutputs_Ldr_Condition_mi_r0_r1_plus_r8_LSR_1_Offset[] = {
122 const Inputs kOutputs_Ldr_Condition_pl_r0_r1_plus_r8_LSR_1_Offset[] = {
139 const Inputs kOutputs_Ldr_Condition_vs_r0_r1_plus_r8_LSR_1_Offset[] = {
156 const Inputs kOutputs_Ldr_Condition_vc_r0_r1_plus_r8_LSR_1_Offset[] = {
173 const Inputs kOutputs_Ldr_Condition_hi_r0_r1_plus_r8_LSR_1_Offset[] = {
190 const Inputs kOutputs_Ldr_Condition_ls_r0_r1_plus_r8_LSR_1_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-8192-str-a32.h37 const Inputs kOutputs_Str_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Str_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Str_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Str_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Str_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Str_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Str_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Str_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Str_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Str_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-rs-ldr-a32.h37 const Inputs kOutputs_Ldr_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Ldr_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Ldr_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Ldr_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Ldr_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Ldr_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Ldr_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Ldr_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Ldr_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Ldr_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-512-strh-a32.h37 const Inputs kOutputs_Strh_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Strh_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Strh_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Strh_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Strh_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Strh_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Strh_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Strh_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Strh_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Strh_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-8192-ldr-a32.h37 const Inputs kOutputs_Ldr_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Ldr_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Ldr_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Ldr_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Ldr_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Ldr_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Ldr_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Ldr_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Ldr_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Ldr_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to32-strb-a32.h37 const Inputs kOutputs_Strb_Condition_eq_r0_r1_plus_r8_LSR_1_Offset[] = {
54 const Inputs kOutputs_Strb_Condition_ne_r0_r1_plus_r8_LSR_1_Offset[] = {
71 const Inputs kOutputs_Strb_Condition_cs_r0_r1_plus_r8_LSR_1_Offset[] = {
88 const Inputs kOutputs_Strb_Condition_cc_r0_r1_plus_r8_LSR_1_Offset[] = {
105 const Inputs kOutputs_Strb_Condition_mi_r0_r1_plus_r8_LSR_1_Offset[] = {
122 const Inputs kOutputs_Strb_Condition_pl_r0_r1_plus_r8_LSR_1_Offset[] = {
139 const Inputs kOutputs_Strb_Condition_vs_r0_r1_plus_r8_LSR_1_Offset[] = {
156 const Inputs kOutputs_Strb_Condition_vc_r0_r1_plus_r8_LSR_1_Offset[] = {
173 const Inputs kOutputs_Strb_Condition_hi_r0_r1_plus_r8_LSR_1_Offset[] = {
190 const Inputs kOutputs_Strb_Condition_ls_r0_r1_plus_r8_LSR_1_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to31-strb-a32.h37 const Inputs kOutputs_Strb_Condition_eq_r0_r1_plus_r8_LSL_1_Offset[] = {
54 const Inputs kOutputs_Strb_Condition_ne_r0_r1_plus_r8_LSL_1_Offset[] = {
71 const Inputs kOutputs_Strb_Condition_cs_r0_r1_plus_r8_LSL_1_Offset[] = {
88 const Inputs kOutputs_Strb_Condition_cc_r0_r1_plus_r8_LSL_1_Offset[] = {
105 const Inputs kOutputs_Strb_Condition_mi_r0_r1_plus_r8_LSL_1_Offset[] = {
122 const Inputs kOutputs_Strb_Condition_pl_r0_r1_plus_r8_LSL_1_Offset[] = {
139 const Inputs kOutputs_Strb_Condition_vs_r0_r1_plus_r8_LSL_1_Offset[] = {
156 const Inputs kOutputs_Strb_Condition_vc_r0_r1_plus_r8_LSL_1_Offset[] = {
173 const Inputs kOutputs_Strb_Condition_hi_r0_r1_plus_r8_LSL_1_Offset[] = {
190 const Inputs kOutputs_Strb_Condition_ls_r0_r1_plus_r8_LSL_1_Offset[] = {
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Dsimulator-cond-rd-memop-rs-shift-amount-1to32-str-a32.h37 const Inputs kOutputs_Str_Condition_eq_r0_r1_plus_r8_LSR_1_Offset[] = {
54 const Inputs kOutputs_Str_Condition_ne_r0_r1_plus_r8_LSR_1_Offset[] = {
71 const Inputs kOutputs_Str_Condition_cs_r0_r1_plus_r8_LSR_1_Offset[] = {
88 const Inputs kOutputs_Str_Condition_cc_r0_r1_plus_r8_LSR_1_Offset[] = {
105 const Inputs kOutputs_Str_Condition_mi_r0_r1_plus_r8_LSR_1_Offset[] = {
122 const Inputs kOutputs_Str_Condition_pl_r0_r1_plus_r8_LSR_1_Offset[] = {
139 const Inputs kOutputs_Str_Condition_vs_r0_r1_plus_r8_LSR_1_Offset[] = {
156 const Inputs kOutputs_Str_Condition_vc_r0_r1_plus_r8_LSR_1_Offset[] = {
173 const Inputs kOutputs_Str_Condition_hi_r0_r1_plus_r8_LSR_1_Offset[] = {
190 const Inputs kOutputs_Str_Condition_ls_r0_r1_plus_r8_LSR_1_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-512-ldrh-a32.h37 const Inputs kOutputs_Ldrh_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Ldrh_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Ldrh_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Ldrh_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Ldrh_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Ldrh_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Ldrh_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Ldrh_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Ldrh_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Ldrh_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rd-memop-rs-strh-a32.h37 const Inputs kOutputs_Strh_Condition_eq_r0_r1_plus_r8_Offset[] = {
54 const Inputs kOutputs_Strh_Condition_ne_r0_r1_plus_r8_Offset[] = {
71 const Inputs kOutputs_Strh_Condition_cs_r0_r1_plus_r8_Offset[] = {
88 const Inputs kOutputs_Strh_Condition_cc_r0_r1_plus_r8_Offset[] = {
105 const Inputs kOutputs_Strh_Condition_mi_r0_r1_plus_r8_Offset[] = {
122 const Inputs kOutputs_Strh_Condition_pl_r0_r1_plus_r8_Offset[] = {
139 const Inputs kOutputs_Strh_Condition_vs_r0_r1_plus_r8_Offset[] = {
156 const Inputs kOutputs_Strh_Condition_vc_r0_r1_plus_r8_Offset[] = {
173 const Inputs kOutputs_Strh_Condition_hi_r0_r1_plus_r8_Offset[] = {
190 const Inputs kOutputs_Strh_Condition_ls_r0_r1_plus_r8_Offset[] = {
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Dsimulator-cond-rd-memop-immediate-512-ldrsh-a32.h37 const Inputs kOutputs_Ldrsh_Condition_eq_r0_r1_plus_0_Offset[] = {
54 const Inputs kOutputs_Ldrsh_Condition_ne_r0_r1_plus_0_Offset[] = {
71 const Inputs kOutputs_Ldrsh_Condition_cs_r0_r1_plus_0_Offset[] = {
88 const Inputs kOutputs_Ldrsh_Condition_cc_r0_r1_plus_0_Offset[] = {
105 const Inputs kOutputs_Ldrsh_Condition_mi_r0_r1_plus_0_Offset[] = {
122 const Inputs kOutputs_Ldrsh_Condition_pl_r0_r1_plus_0_Offset[] = {
139 const Inputs kOutputs_Ldrsh_Condition_vs_r0_r1_plus_0_Offset[] = {
156 const Inputs kOutputs_Ldrsh_Condition_vc_r0_r1_plus_0_Offset[] = {
173 const Inputs kOutputs_Ldrsh_Condition_hi_r0_r1_plus_0_Offset[] = {
190 const Inputs kOutputs_Ldrsh_Condition_ls_r0_r1_plus_0_Offset[] = {
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Dsimulator-cond-rdlow-operand-imm8-movs-t32.h37 const Inputs kOutputs_Movs_Condition_eq_r0_0[] = {
54 const Inputs kOutputs_Movs_Condition_ne_r0_0[] = {
71 const Inputs kOutputs_Movs_Condition_cs_r0_0[] = {
88 const Inputs kOutputs_Movs_Condition_cc_r0_0[] = {
105 const Inputs kOutputs_Movs_Condition_mi_r0_0[] = {
122 const Inputs kOutputs_Movs_Condition_pl_r0_0[] = {
139 const Inputs kOutputs_Movs_Condition_vs_r0_0[] = {
156 const Inputs kOutputs_Movs_Condition_vc_r0_0[] = {
173 const Inputs kOutputs_Movs_Condition_hi_r0_0[] = {
190 const Inputs kOutputs_Movs_Condition_ls_r0_0[] = {
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