Searched refs:InstInfo (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/mesa/program/ |
| D | prog_instruction.c | 92 static const struct instruction_info InstInfo[MAX_OPCODE] = { variable
163 assert(opcode == InstInfo[opcode].Opcode); in _mesa_num_inst_src_regs()
164 assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode); in _mesa_num_inst_src_regs()
165 return InstInfo[opcode].NumSrcRegs; in _mesa_num_inst_src_regs()
176 assert(opcode == InstInfo[opcode].Opcode); in _mesa_num_inst_dst_regs()
177 assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode); in _mesa_num_inst_dst_regs()
178 return InstInfo[opcode].NumDstRegs; in _mesa_num_inst_dst_regs()
250 return InstInfo[opcode].Name; in _mesa_opcode_string()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 1243 CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator); in GetNumNodeResults() local
1245 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs; in GetNumNodeResults()
1248 for (unsigned i = 0; i != InstInfo.Operands.NumDefs; ++i) { in GetNumNodeResults()
1249 Record *OperandNode = InstInfo.Operands[i].Rec; in GetNumNodeResults()
1257 if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other) in GetNumNodeResults()
1823 CodeGenInstruction &InstInfo = in ApplyTypeConstraints() local
1830 unsigned NumResultsToAdd = std::min(InstInfo.Operands.NumDefs, in ApplyTypeConstraints()
1837 if (!InstInfo.ImplicitDefs.empty()) { in ApplyTypeConstraints()
1843 InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()); in ApplyTypeConstraints()
1942 if (!InstInfo.Operands.isVariadic && ChildNo != getNumChildren()) { in ApplyTypeConstraints()
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 1033 CodeGenInstruction &InstInfo = CDP.getTargetInfo().getInstruction(Operator); in GetNumNodeResults() local
1036 unsigned NumDefsToAdd = InstInfo.Operands.NumDefs ? 1 : 0; in GetNumNodeResults()
1039 if (InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()) !=MVT::Other) in GetNumNodeResults()
1523 CodeGenInstruction &InstInfo = in ApplyTypeConstraints() local
1531 unsigned NumResultsToAdd = InstInfo.Operands.NumDefs ? 1 : 0; in ApplyTypeConstraints()
1555 if (!InstInfo.ImplicitDefs.empty()) { in ApplyTypeConstraints()
1561 InstInfo.HasOneImplicitDefWithKnownVT(CDP.getTargetInfo()); in ApplyTypeConstraints()
2541 CodeGenInstruction &InstInfo = Target.getInstruction(Instrs[i]); in ParseInstructions() local
2543 if (InstInfo.Operands.size() != 0) { in ParseInstructions()
2544 if (InstInfo.Operands.NumDefs == 0) { in ParseInstructions()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 60 ParseInstructionInfo *InstInfo; member in __anon01f3a6ab0111::X86AsmParser
805 : MCTargetAsmParser(Options, sti), MII(mii), InstInfo(nullptr) { in X86AsmParser()
1169 InstInfo->AsmRewrites->emplace_back(AOK_SizeDirective, Start, in CreateMemForInlineAsm()
1189 InstInfo->AsmRewrites->emplace_back(AOK_SizeDirective, Start, in CreateMemForInlineAsm()
1330 InstInfo->AsmRewrites->emplace_back(AOK_ImmPrefix, Tok.getLoc()); in ParseIntelExpression()
1410 RewriteIntelBracExpression(*InstInfo->AsmRewrites, SM.getSymName(), in ParseIntelBracExpression()
1502 InstInfo->AsmRewrites->emplace_back(AOK_Label, Loc, Identifier.size(), in ParseIntelIdentifier()
1530 InstInfo->AsmRewrites->emplace_back(AOK_ImmPrefix, ImmDispToken.getLoc()); in ParseIntelSegmentOverride()
1699 InstInfo->AsmRewrites->emplace_back(AOK_DotOperator, Loc, Len, Val); in ParseIntelDotOperator()
1723 InstInfo->AsmRewrites->emplace_back(AOK_Skip, OffsetOfLoc, 7); in ParseIntelOffsetOfOperator()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 184 struct InstInfo { struct
190 SmallVector<InstInfo, 4> Insts;
194 InstInfo Info = {I, SPAdjust, BeforeFPSet}; in addInst()
200 [&](InstInfo &Info) { return Info.I == I; }); in addExtraBytes()
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