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Searched refs:Iop_CatEvenLanes32x4 (Results 1 – 10 of 10) sorted by relevance

/external/valgrind/VEX/pub/
Dlibvex_ir.h1763 Iop_CatEvenLanes8x16, Iop_CatEvenLanes16x8, Iop_CatEvenLanes32x4, enumerator
/external/valgrind/VEX/priv/
Dguest_arm64_toIR.c667 Iop_CatEvenLanes32x4, Iop_InterleaveLO64x2 }; in mkVecCATEVENLANES()
3615 binop(Iop_CatEvenLanes32x4,(_argL),(_argR))
3979 assign(*u0, binop(Iop_CatEvenLanes32x4, mkexpr(i1), mkexpr(i0))); in math_DEINTERLEAVE2_128()
4259 *doubler = Iop_InterleaveLO32x4; *halver = Iop_CatEvenLanes32x4; in math_get_doubler_and_halver()
7228 return binop(Iop_CatEvenLanes32x4, mkexpr(a3210), mkexpr(b3210)); in mk_CatEvenLanes32x4()
7947 ops[2] = (ix & 4) ? Iop_CatOddLanes32x4 : Iop_CatEvenLanes32x4; in math_DUP_VEC_ELEM()
8485 assign(*rearrR, binop(Iop_CatEvenLanes32x4, mkexpr(vecM), mkexpr(vecN))); in math_REARRANGE_FOR_FLOATING_PAIRWISE()
11860 binop(Iop_CatEvenLanes32x4, mkexpr(res128), in dis_AdvSIMD_three_same()
11909 binop(Iop_CatEvenLanes32x4, mkexpr(res128), in dis_AdvSIMD_three_same()
Dhost_arm64_isel.c2435 case Iop_InterleaveLO64x2: case Iop_CatEvenLanes32x4: in iselV128Expr_wrk()
2521 case Iop_CatEvenLanes32x4: op = ARM64vecb_UZP132x4; sw = True; in iselV128Expr_wrk()
Dir_defs.c1062 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return; in ppIROp()
3068 case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4: in typeOfPrimop()
Dhost_arm_isel.c4662 case Iop_CatEvenLanes32x4: { in iselNeonExpr_wrk()
4675 case Iop_CatEvenLanes32x4: resRd = True; size = 2; break; in iselNeonExpr_wrk()
Dhost_ppc_isel.c5923 case Iop_CatEvenLanes32x4: op = Pav_CATEVEN; goto do_AvBin32x4; in iselVecExpr_wrk()
Dguest_arm_toIR.c7352 op_even = Iop_CatEvenLanes32x4; in dis_neon_data_2reg_misc()
Dguest_ppc_toIR.c24702 binop(Iop_CatEvenLanes32x4, mkexpr(vA), mkexpr(vB) ) ); in dis_av_permute()
/external/valgrind/memcheck/tests/vbit-test/
Dirops.c984 { DEFOP(Iop_CatEvenLanes32x4, UNDEF_UNKNOWN), },
/external/valgrind/memcheck/
Dmc_translate.c3676 case Iop_CatEvenLanes32x4: in expr2vbits_Binop()