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Searched refs:MCSubtargetInfo (Results 1 – 25 of 263) sorted by relevance

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/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.h27 const MCSubtargetInfo &STI) override;
31 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
33 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
37 const MCSubtargetInfo &STI,
41 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
45 const MCSubtargetInfo &STI, raw_ostream &O);
47 const MCSubtargetInfo &STI, raw_ostream &O);
50 const MCSubtargetInfo &STI, raw_ostream &O);
52 const MCSubtargetInfo &STI, raw_ostream &O);
54 const MCSubtargetInfo &STI, raw_ostream &O);
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DARMInstPrinter.cpp72 StringRef Annot, const MCSubtargetInfo &STI) { in printInst()
273 const MCSubtargetInfo &STI, raw_ostream &O) { in printOperand()
313 const MCSubtargetInfo &STI, in printThumbLdrLabelOperand()
343 const MCSubtargetInfo &STI, in printSORegRegOperand()
363 const MCSubtargetInfo &STI, in printSORegImmOperand()
380 const MCSubtargetInfo &STI, in printAM2PreOrOffsetIndexOp()
409 const MCSubtargetInfo &STI, in printAddrModeTBB()
421 const MCSubtargetInfo &STI, in printAddrModeTBH()
433 const MCSubtargetInfo &STI, in printAddrMode2Operand()
453 const MCSubtargetInfo &STI, in printAddrMode2OffsetOperand()
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/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.h30 class MCSubtargetInfo; variable
40 bool isMicroMips(const MCSubtargetInfo &STI) const;
41 bool isMips32r6(const MCSubtargetInfo &STI) const;
51 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
56 const MCSubtargetInfo &STI) const override;
62 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
76 const MCSubtargetInfo &STI) const;
82 const MCSubtargetInfo &STI) const;
86 const MCSubtargetInfo &STI) const;
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DMipsMCCodeEmitter.cpp151 bool MipsMCCodeEmitter::isMicroMips(const MCSubtargetInfo &STI) const { in isMicroMips()
155 bool MipsMCCodeEmitter::isMips32r6(const MCSubtargetInfo &STI) const { in isMips32r6()
164 const MCSubtargetInfo &STI, in EmitInstruction()
186 const MCSubtargetInfo &STI) const in encodeInstruction()
271 const MCSubtargetInfo &STI) const { in getBranchTargetOpValue()
294 const MCSubtargetInfo &STI) const { in getBranchTargetOpValue1SImm16()
317 const MCSubtargetInfo &STI) const { in getBranchTargetOpValueMMR6()
341 const MCSubtargetInfo &STI) const { in getBranchTarget7OpValueMM()
363 const MCSubtargetInfo &STI) const { in getBranchTargetOpValueMMPC10()
385 const MCSubtargetInfo &STI) const { in getBranchTargetOpValueMM()
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/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.h28 const MCSubtargetInfo &STI) override;
32 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
34 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
38 const MCSubtargetInfo &STI,
47 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
50 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
52 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
60 const MCSubtargetInfo &STI, raw_ostream &O) { in printPostIncOperand()
65 const MCSubtargetInfo &STI, raw_ostream &O);
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DAArch64InstPrinter.cpp53 const MCSubtargetInfo &STI) { in printInst()
675 const MCSubtargetInfo &STI) { in printInst()
727 const MCSubtargetInfo &STI, in printSysAlias()
972 const MCSubtargetInfo &STI, in printOperand()
987 const MCSubtargetInfo &STI, in printImm()
994 const MCSubtargetInfo &STI, in printImmHex()
1014 const MCSubtargetInfo &STI, in printVRegOperand()
1023 const MCSubtargetInfo &STI, in printSysCROperand()
1031 const MCSubtargetInfo &STI, in printAddSubImm()
1053 const MCSubtargetInfo &STI, in printLogicalImm32()
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/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp50 const MCSubtargetInfo &STI) const;
56 const MCSubtargetInfo &STI) const;
64 const MCSubtargetInfo &STI) const;
70 const MCSubtargetInfo &STI) const;
76 const MCSubtargetInfo &STI) const;
82 const MCSubtargetInfo &STI) const;
88 const MCSubtargetInfo &STI) const;
95 const MCSubtargetInfo &STI) const;
101 const MCSubtargetInfo &STI) const;
107 const MCSubtargetInfo &STI) const;
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/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp53 bool isThumb(const MCSubtargetInfo &STI) const { in isThumb()
56 bool isThumb2(const MCSubtargetInfo &STI) const { in isThumb2()
59 bool isTargetMachO(const MCSubtargetInfo &STI) const { in isTargetMachO()
70 const MCSubtargetInfo &STI) const;
76 const MCSubtargetInfo &STI) const;
83 const MCSubtargetInfo &STI) const;
88 const MCSubtargetInfo &STI) const;
94 const MCSubtargetInfo &STI) const;
100 const MCSubtargetInfo &STI) const;
105 const MCSubtargetInfo &STI) const;
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp53 const MCSubtargetInfo &STI) const;
56 const MCSubtargetInfo &STI) const;
59 const MCSubtargetInfo &STI) const;
62 const MCSubtargetInfo &STI) const;
65 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
71 const MCSubtargetInfo &STI) const;
74 const MCSubtargetInfo &STI) const;
77 const MCSubtargetInfo &STI) const;
80 const MCSubtargetInfo &STI) const;
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/external/llvm/lib/Target/Sparc/InstPrinter/
DSparcInstPrinter.h29 const MCSubtargetInfo &STI) override;
30 bool printSparcAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
32 bool isV9(const MCSubtargetInfo &STI) const;
35 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
37 bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
41 const MCSubtargetInfo &STI, raw_ostream &O);
44 void printOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
46 void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
48 void printCCOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
50 bool printGetPCX(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp42 const MCSubtargetInfo &STI) const override;
48 const MCSubtargetInfo &STI) const;
54 const MCSubtargetInfo &STI) const;
62 const MCSubtargetInfo &STI) const;
65 const MCSubtargetInfo &STI) const;
68 const MCSubtargetInfo &STI) const;
71 const MCSubtargetInfo &STI) const;
74 const MCSubtargetInfo &STI) const;
77 const MCSubtargetInfo &STI) const;
91 const MCSubtargetInfo &STI) const { in getPC16DBLEncoding()
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/external/llvm/lib/Target/Mips/
DMipsTargetStreamer.h88 SMLoc IDLoc, const MCSubtargetInfo *STI);
104 const MCSubtargetInfo *STI);
106 const MCSubtargetInfo *STI);
108 const MCSubtargetInfo *STI);
110 const MCSubtargetInfo *STI);
112 const MCSubtargetInfo *STI);
114 SMLoc IDLoc, const MCSubtargetInfo *STI);
116 SMLoc IDLoc, const MCSubtargetInfo *STI);
118 SMLoc IDLoc, const MCSubtargetInfo *STI);
120 const MCSubtargetInfo *STI);
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DMipsAsmPrinter.h65 void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
66 const MCSubtargetInfo *EndInfo) const override;
68 void EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol);
70 void EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode, unsigned Reg);
72 void EmitInstrRegReg(const MCSubtargetInfo &STI, unsigned Opcode,
75 void EmitInstrRegRegReg(const MCSubtargetInfo &STI, unsigned Opcode,
78 void EmitMovFPIntPair(const MCSubtargetInfo &STI, unsigned MovOpc,
82 void EmitSwapFPIntParams(const MCSubtargetInfo &STI,
86 void EmitSwapFPIntRetval(const MCSubtargetInfo &STI,
/external/llvm/lib/Target/Lanai/MCTargetDesc/
DLanaiMCCodeEmitter.cpp54 const MCSubtargetInfo &SubtargetInfo) const;
60 const MCSubtargetInfo &SubtargetInfo) const;
64 const MCSubtargetInfo &SubtargetInfo) const;
68 const MCSubtargetInfo &SubtargetInfo) const;
72 const MCSubtargetInfo &SubtargetInfo) const;
76 const MCSubtargetInfo &SubtargetInfo) const;
80 const MCSubtargetInfo &SubtargetInfo) const;
84 const MCSubtargetInfo &SubtargetInfo) const override;
87 const MCSubtargetInfo &STI) const;
90 const MCSubtargetInfo &STI) const;
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/external/llvm/lib/MC/
DMCSubtargetInfo.cpp27 void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) { in InitMCProcessorInfo()
35 void MCSubtargetInfo::setDefaultFeatures(StringRef CPU, StringRef FS) { in setDefaultFeatures()
39 MCSubtargetInfo::MCSubtargetInfo( in MCSubtargetInfo() function in MCSubtargetInfo
53 FeatureBitset MCSubtargetInfo::ToggleFeature(uint64_t FB) { in ToggleFeature()
58 FeatureBitset MCSubtargetInfo::ToggleFeature(const FeatureBitset &FB) { in ToggleFeature()
65 FeatureBitset MCSubtargetInfo::ToggleFeature(StringRef FS) { in ToggleFeature()
70 FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) { in ApplyFeatureFlag()
75 const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const { in getSchedModelForCPU()
101 MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const { in getInstrItineraryForCPU()
107 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const { in initInstrItins()
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp47 const MCSubtargetInfo &STI) const override;
53 const MCSubtargetInfo &STI) const;
59 const MCSubtargetInfo &STI) const;
63 const MCSubtargetInfo &STI) const;
66 const MCSubtargetInfo &STI) const;
69 const MCSubtargetInfo &STI) const;
72 const MCSubtargetInfo &STI) const;
85 const MCSubtargetInfo &STI) const { in encodeInstruction()
118 const MCSubtargetInfo &STI) const { in getMachineOpValue()
145 const MCSubtargetInfo &STI) const { in getCallTargetOpValue()
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/external/llvm/include/llvm/MC/
DMCSubtargetInfo.h30 class MCSubtargetInfo {
48 MCSubtargetInfo() = delete;
49 MCSubtargetInfo &operator=(MCSubtargetInfo &&) = delete;
50 MCSubtargetInfo &operator=(const MCSubtargetInfo &) = delete;
53 MCSubtargetInfo(const MCSubtargetInfo &) = default;
54 MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS,
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.h24 class MCSubtargetInfo; variable
32 const MCSubtargetInfo *&STI);
53 const MCSubtargetInfo *&STI);
55 X86AsmInstrumentation(const MCSubtargetInfo *&STI);
61 const MCSubtargetInfo *&STI;
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCShuffler.h30 HexagonMCShuffler(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, in HexagonMCShuffler()
35 HexagonMCShuffler(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
56 bool HexagonMCShuffle(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
58 bool HexagonMCShuffle(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
60 unsigned HexagonMCShuffle(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
DHexagonMCCodeEmitter.h38 const MCSubtargetInfo &STI) const;
49 MCSubtargetInfo const &STI) const override;
53 const MCSubtargetInfo &STI,
60 MCSubtargetInfo const &STI) const;
65 MCSubtargetInfo const &STI) const;
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86Disassembler.h95 class MCSubtargetInfo; variable
111 X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode);
132 X86_16Disassembler(const MCSubtargetInfo &STI) : in X86_16Disassembler()
140 X86_32Disassembler(const MCSubtargetInfo &STI) : in X86_32Disassembler()
148 X86_64Disassembler(const MCSubtargetInfo &STI) : in X86_64Disassembler()
/external/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.h23 class MCSubtargetInfo; variable
56 bool isSI(const MCSubtargetInfo &STI);
57 bool isCI(const MCSubtargetInfo &STI);
58 bool isVI(const MCSubtargetInfo &STI);
62 unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI);
/external/llvm/lib/MC/MCParser/
DMCTargetAsmParser.cpp15 const MCSubtargetInfo &STI) in MCTargetAsmParser()
24 MCSubtargetInfo &MCTargetAsmParser::copySTI() { in copySTI()
25 MCSubtargetInfo &STICopy = getContext().getSubtargetCopy(getSTI()); in copySTI()
30 const MCSubtargetInfo &MCTargetAsmParser::getSTI() const { in getSTI()
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DAMDGPUMCCodeEmitter.h25 class MCSubtargetInfo; variable
33 const MCSubtargetInfo &STI) const;
37 const MCSubtargetInfo &STI) const { in getMachineOpValue()
43 const MCSubtargetInfo &STI) const { in getSOPPBrEncoding()
/external/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp46 const MCSubtargetInfo &STI) const;
52 const MCSubtargetInfo &STI) const;
56 const MCSubtargetInfo &STI) const;
60 const MCSubtargetInfo &STI) const override;
79 const MCSubtargetInfo &STI) const { in getMachineOpValue()
110 const MCSubtargetInfo &STI) const { in encodeInstruction()
156 const MCSubtargetInfo &STI) const { in getMemoryOpValue()

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