Searched refs:MFENCE (Results 1 – 19 of 19) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 311 MFENCE, enumerator
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D | X86InstrInfo.td | 113 def X86MFence : SDNode<"X86ISD::MFENCE", SDT_X86MEMBARRIER,
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D | X86GenAsmWriter.inc | 1231 4888U, // MFENCE 5962 "SDrr_Int\000MAXSSrm\000MAXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000"
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D | X86GenAsmWriter1.inc | 1231 3608U, // MFENCE 6705 "SDrr_Int\000MAXSSrm\000MAXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000"
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D | X86GenInstrInfo.inc | 1234 MFENCE = 1218, 5402 …0, 0, "MFENCE", 0|(1<<MCID::MayLoad)|(1<<MCID::MayStore)|(1<<MCID::UnmodeledSideEffects), 0x15c000…
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D | X86ISelLowering.cpp | 10202 return DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Op.getOperand(0)); in LowerMEMBARRIER() 10220 return DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Op.getOperand(0)); in LowerATOMIC_FENCE()
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D | X86InstrSSE.td | 3196 def MFENCE : I<0xAE, MRM_F0, (outs), (ins), 3201 def : Pat<(X86MFence), (MFENCE)>;
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D | X86GenAsmMatcher.inc | 3811 { X86::MFENCE, "mfence", Convert, { }, 0},
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D | X86GenDisassemblerTables.inc | 14635 "MFENCE" 133227 0x4c2, /* MFENCE*/ 136554 0x4c2, /* MFENCE*/ 139905 0x4c2, /* MFENCE*/ 143261 0x4c2, /* MFENCE*/ 146612 0x4c2, /* MFENCE*/ 149973 0x4c2, /* MFENCE*/ 153320 0x4c2, /* MFENCE*/ 156672 0x4c2, /* MFENCE*/ 160019 0x4c2, /* MFENCE*/ [all …]
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D | X86GenDAGISel.inc | 26275 /*53943*/ OPC_MorphNodeTo, TARGET_VAL(X86::MFENCE), 0|OPFL_Chain, 26278 // Dst: (MFENCE) 46364 /*SwitchOpcode*/ 8, TARGET_VAL(X86ISD::MFENCE),// ->96834 46367 /*96828*/ OPC_MorphNodeTo, TARGET_VAL(X86::MFENCE), 0|OPFL_Chain, 46370 // Dst: (MFENCE)
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 517 MFENCE, enumerator
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D | X86InstrInfo.td | 127 def X86MFence : SDNode<"X86ISD::MFENCE", SDT_X86MEMBARRIER,
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D | X86InstrSSE.td | 3688 def MFENCE : I<0xAE, MRM_F0, (outs), (ins), 3693 def : Pat<(X86MFence), (MFENCE)>;
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D | X86ISelLowering.cpp | 20700 return DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Op.getOperand(0)); in LowerATOMIC_FENCE() 22270 case X86ISD::MFENCE: return "X86ISD::MFENCE"; in getTargetNodeName()
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/external/mesa3d/src/gallium/docs/source/ |
D | tgsi.rst | 2596 .. opcode:: MFENCE - Memory fence 2598 Syntax: ``MFENCE resource`` 2600 Example: ``MFENCE RES[0]`` 2614 Similar to MFENCE, but it only affects the ordering of memory loads. 2623 Similar to MFENCE, but it only affects the ordering of memory stores.
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/external/llvm/docs/ |
D | Atomics.rst | 436 fences generate an ``MFENCE``, other fences do not cause any code to be
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/external/capstone/arch/X86/ |
D | X86GenAsmWriter.inc | 1375 14298U, // MFENCE 7646 0U, // MFENCE
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D | X86GenAsmWriter1.inc | 1375 11414U, // MFENCE 7646 0U, // MFENCE
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D | X86GenDisassemblerTables.inc | 12728 /* MFENCE */ 51568 0x54e, /* MFENCE */ 53014 0x54e, /* MFENCE */ 53256 0x54e, /* MFENCE */ 53341 0x54e, /* MFENCE */
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