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Searched refs:MSUB_S (Results 1 – 11 of 11) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.h627 MSUB_S = ((5U << 3) + 0), enumerator
Ddisasm-mips.cc1385 case MSUB_S: in DecodeTypeRegister()
Dassembler-mips.cc2520 GenInstrRegister(COP1X, fr, ft, fs, fd, MSUB_S); in msub_s()
Dsimulator-mips.cc3623 case MSUB_S: { in DecodeTypeRegisterCOP1X()
/external/v8/src/mips64/
Dconstants-mips64.h657 MSUB_S = ((5U << 3) + 0), enumerator
Ddisasm-mips64.cc1140 case MSUB_S: in DecodeTypeRegisterCOP1X()
Dassembler-mips64.cc2848 GenInstrRegister(COP1X, fr, ft, fs, fd, MSUB_S); in msub_s()
Dsimulator-mips64.cc3502 case MSUB_S: { in DecodeTypeRegisterCOP1X()
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td483 def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>,
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc1169 33576977U, // MSUB_S
2883 5U, // MSUB_S
DMipsGenDisassemblerTables.inc1227 /* 3412 */ MCD_OPC_Decode, 128, 9, 91, // Opcode: MSUB_S