| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 95 MemOpQueue &MemOps,
111 unsigned Scratch, MemOpQueue &MemOps,
114 void AdvanceRS(MachineBasicBlock &MBB, MemOpQueue &MemOps);
441 unsigned Scratch, MemOpQueue &MemOps, in MergeLDR_STR() argument
444 int Offset = MemOps[SIndex].Offset; in MergeLDR_STR()
447 MachineBasicBlock::iterator Loc = MemOps[SIndex].MBBI; in MergeLDR_STR()
474 for (unsigned i = SIndex+1, e = MemOps.size(); i != e; ++i) { in MergeLDR_STR()
475 int NewOffset = MemOps[i].Offset; in MergeLDR_STR()
476 const MachineOperand &MO = MemOps[i].MBBI->getOperand(0); in MergeLDR_STR()
492 MergeOpsUpdate(MBB, MemOps, SIndex, i, insertAfter, SOffset, in MergeLDR_STR()
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| D | ARMISelLowering.cpp | 2453 SmallVector<SDValue, 4> MemOps; in VarArgStyleRegisters() local
2467 MemOps.push_back(Store); in VarArgStyleRegisters()
2471 if (!MemOps.empty()) in VarArgStyleRegisters()
2473 &MemOps[0], MemOps.size()); in VarArgStyleRegisters()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 161 void FormCandidates(const MemOpQueue &MemOps);
956 void ARMLoadStoreOpt::FormCandidates(const MemOpQueue &MemOps) { in FormCandidates() argument
957 const MachineInstr *FirstMI = MemOps[0].MI; in FormCandidates()
963 unsigned EIndex = MemOps.size(); in FormCandidates()
966 const MachineInstr *MI = MemOps[SIndex].MI; in FormCandidates()
967 int Offset = MemOps[SIndex].Offset; in FormCandidates()
999 int NewOffset = MemOps[I].Offset; in FormCandidates()
1002 const MachineOperand &MO = getLoadStoreRegOp(*MemOps[I].MI); in FormCandidates()
1029 unsigned Position = MemOps[I].Position; in FormCandidates()
1030 if (Position < MemOps[Latest].Position) in FormCandidates()
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| D | ARMISelLowering.cpp | 3154 SmallVector<SDValue, 4> MemOps; in StoreByValRegs() local
3164 MemOps.push_back(Store); in StoreByValRegs()
3168 if (!MemOps.empty()) in StoreByValRegs()
3169 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in StoreByValRegs()
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| /external/llvm/test/CodeGen/Hexagon/ |
| D | memops3.ll | 2 ; Generate MemOps for V4 and above.
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| D | memops2.ll | 2 ; Generate MemOps for V4 and above.
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| D | memops1.ll | 2 ; Generate MemOps for V4 and above.
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| D | memops.ll | 2 ; Generate MemOps for V4 and above.
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 3345 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, in FindOptimalMemOpLowering() argument
3407 MemOps.push_back(VT); in FindOptimalMemOpLowering()
3430 std::vector<EVT> MemOps; in getMemcpyLoadsAndStores() local
3446 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, in getMemcpyLoadsAndStores()
3453 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); in getMemcpyLoadsAndStores()
3464 unsigned NumMemOps = MemOps.size(); in getMemcpyLoadsAndStores()
3467 EVT VT = MemOps[i]; in getMemcpyLoadsAndStores()
3523 std::vector<EVT> MemOps; in getMemmoveLoadsAndStores() local
3536 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, in getMemmoveLoadsAndStores()
3542 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); in getMemmoveLoadsAndStores()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 4183 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, in FindOptimalMemOpLowering() argument
4278 MemOps.push_back(VT); in FindOptimalMemOpLowering()
4308 std::vector<EVT> MemOps; in getMemcpyLoadsAndStores() local
4324 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, in getMemcpyLoadsAndStores()
4334 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); in getMemcpyLoadsAndStores()
4354 unsigned NumMemOps = MemOps.size(); in getMemcpyLoadsAndStores()
4357 EVT VT = MemOps[i]; in getMemcpyLoadsAndStores()
4424 std::vector<EVT> MemOps; in getMemmoveLoadsAndStores() local
4437 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, in getMemmoveLoadsAndStores()
4446 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); in getMemmoveLoadsAndStores()
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1153 SmallVector<SDValue, 4> MemOps; in LowerCCCArguments() local
1173 MemOps.push_back(Store); in LowerCCCArguments()
1175 if (!MemOps.empty()) in LowerCCCArguments()
1177 &MemOps[0], MemOps.size()); in LowerCCCArguments()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1302 SmallVector<SDValue, 4> MemOps; in LowerCCCArguments() local
1382 MemOps.push_back(Store); in LowerCCCArguments()
1410 MemOps.push_back(DAG.getMemcpy(Chain, dl, FIN, ArgDI->SDV, in LowerCCCArguments()
1421 if (!MemOps.empty()) { in LowerCCCArguments()
1422 MemOps.push_back(Chain); in LowerCCCArguments()
1423 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in LowerCCCArguments()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 1760 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments_SVR4() local
1805 MemOps.push_back(Store); in LowerFormalArguments_SVR4()
1824 MemOps.push_back(Store); in LowerFormalArguments_SVR4()
1832 if (!MemOps.empty()) in LowerFormalArguments_SVR4()
1834 MVT::Other, &MemOps[0], MemOps.size()); in LowerFormalArguments_SVR4()
1939 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments_Darwin() local
1993 MemOps.push_back(Store); in LowerFormalArguments_Darwin()
2017 MemOps.push_back(Store); in LowerFormalArguments_Darwin()
2190 MemOps.push_back(Store); in LowerFormalArguments_Darwin()
2197 if (!MemOps.empty()) in LowerFormalArguments_Darwin()
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| /external/llvm/lib/CodeGen/ |
| D | MachineScheduler.cpp | 1381 void clusterNeighboringMemOps(ArrayRef<SUnit *> MemOps, ScheduleDAGMI *DAG);
1399 ArrayRef<SUnit *> MemOps, ScheduleDAGMI *DAG) { in clusterNeighboringMemOps() argument
1401 for (unsigned Idx = 0, End = MemOps.size(); Idx != End; ++Idx) { in clusterNeighboringMemOps()
1402 SUnit *SU = MemOps[Idx]; in clusterNeighboringMemOps()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 1218 SmallVector<SDValue, 79-3+1> MemOps; in LowerFormalArguments() local
1230 MemOps.push_back(Store); in LowerFormalArguments()
1235 if (!MemOps.empty()) in LowerFormalArguments()
1237 &MemOps[0], MemOps.size()); in LowerFormalArguments()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 3031 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments_32SVR4() local
3077 MemOps.push_back(Store); in LowerFormalArguments_32SVR4()
3096 MemOps.push_back(Store); in LowerFormalArguments_32SVR4()
3104 if (!MemOps.empty()) in LowerFormalArguments_32SVR4()
3105 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in LowerFormalArguments_32SVR4()
3195 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments_64SVR4() local
3299 MemOps.push_back(Store); in LowerFormalArguments_64SVR4()
3326 MemOps.push_back(Store); in LowerFormalArguments_64SVR4()
3531 MemOps.push_back(Store); in LowerFormalArguments_64SVR4()
3538 if (!MemOps.empty()) in LowerFormalArguments_64SVR4()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2645 SmallVector<SDValue, 8> MemOps; in saveVarArgRegisters() local
2667 MemOps.push_back(Store); in saveVarArgRegisters()
2697 MemOps.push_back(Store); in saveVarArgRegisters()
2706 if (!MemOps.empty()) { in saveVarArgRegisters()
2707 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps); in saveVarArgRegisters()
4234 SmallVector<SDValue, 4> MemOps; in LowerAAPCS_VASTART() local
4238 MemOps.push_back(DAG.getStore(Chain, DL, Stack, VAList, in LowerAAPCS_VASTART()
4253 MemOps.push_back(DAG.getStore(Chain, DL, GRTop, GRTopAddr, in LowerAAPCS_VASTART()
4268 MemOps.push_back(DAG.getStore(Chain, DL, VRTop, VRTopAddr, in LowerAAPCS_VASTART()
4275 MemOps.push_back(DAG.getStore(Chain, DL, in LowerAAPCS_VASTART()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1906 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments() local
1921 MemOps.push_back(Store); in LowerFormalArguments()
1945 MemOps.push_back(DAG.getNode(X86ISD::VASTART_SAVE_XMM_REGS, dl, in LowerFormalArguments()
1950 if (!MemOps.empty()) in LowerFormalArguments()
1952 &MemOps[0], MemOps.size()); in LowerFormalArguments()
9007 SmallVector<SDValue, 8> MemOps; in LowerVASTART() local
9014 MemOps.push_back(Store); in LowerVASTART()
9023 MemOps.push_back(Store); in LowerVASTART()
9033 MemOps.push_back(Store); in LowerVASTART()
9042 MemOps.push_back(Store); in LowerVASTART()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 988 SDValue MemOps[SystemZ::NumArgFPRs]; in LowerFormalArguments() local
996 MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN, in LowerFormalArguments()
1002 makeArrayRef(&MemOps[NumFixedFPRs], in LowerFormalArguments()
2820 SDValue MemOps[NumFields]; in lowerVASTART() local
2827 MemOps[I] = DAG.getStore(Chain, DL, Fields[I], FieldAddr, in lowerVASTART()
2832 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps); in lowerVASTART()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1089 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments() local
1190 if (!MemOps.empty()) in LowerFormalArguments()
1191 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in LowerFormalArguments()
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| D | HexagonInstrInfoV4.td | 3137 // Define 'def Pats' for MemOps with register addend.
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2771 SmallVector<SDValue, 8> MemOps; in LowerFormalArguments() local
2784 MemOps.push_back(Store); in LowerFormalArguments()
2799 MemOps.push_back(DAG.getNode(X86ISD::VASTART_SAVE_XMM_REGS, dl, in LowerFormalArguments()
2803 if (!MemOps.empty()) in LowerFormalArguments()
2804 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in LowerFormalArguments()
16912 SmallVector<SDValue, 8> MemOps; in LowerVASTART() local
16919 MemOps.push_back(Store); in LowerVASTART()
16927 MemOps.push_back(Store); in LowerVASTART()
16935 MemOps.push_back(Store); in LowerVASTART()
16943 MemOps.push_back(Store); in LowerVASTART()
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