Searched refs:OUT_PKT4 (Results 1 – 6 of 6) sorted by relevance
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_emit.c | 271 OUT_PKT4(ring, REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO, 2); in emit_border_color() 374 OUT_PKT4(ring, REG_A5XX_VFD_FETCH(j), 4); in fd5_emit_vertex_bufs() 379 OUT_PKT4(ring, REG_A5XX_VFD_DECODE(j), 2); in fd5_emit_vertex_bufs() 387 OUT_PKT4(ring, REG_A5XX_VFD_DEST_CNTL(j), 1); in fd5_emit_vertex_bufs() 395 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs() 418 OUT_PKT4(ring, REG_A5XX_RB_RENDER_COMPONENTS, 1); in fd5_emit_state() 437 OUT_PKT4(ring, REG_A5XX_RB_ALPHA_CONTROL, 1); in fd5_emit_state() 440 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_CONTROL, 1); in fd5_emit_state() 448 OUT_PKT4(ring, REG_A5XX_RB_STENCILREFMASK, 1); in fd5_emit_state() 457 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_CNTL, 1); in fd5_emit_state() [all …]
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D | fd5_gmem.c | 95 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5); in emit_mrt() 111 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1); in emit_mrt() 118 OUT_PKT4(ring, REG_A5XX_RB_MRT_FLAG_BUFFER(i), 4); in emit_mrt() 146 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5); in emit_zs() 157 OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1); in emit_zs() 160 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3); in emit_zs() 175 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 5); in emit_zs() 186 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 1); in emit_zs() 190 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5); in emit_zs() 197 OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1); in emit_zs() [all …]
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D | fd5_program.c | 377 OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CONTROL_REG, 5); in fd5_program_emit() 394 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); in fd5_program_emit() 397 OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CNTL, 5); in fd5_program_emit() 404 OUT_PKT4(ring, REG_A5XX_SP_VS_CONTROL_REG, 5); in fd5_program_emit() 421 OUT_PKT4(ring, REG_A5XX_SP_CS_CONFIG, 1); in fd5_program_emit() 424 OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CONSTLEN, 2); in fd5_program_emit() 428 OUT_PKT4(ring, REG_A5XX_HLSQ_FS_CONSTLEN, 2); in fd5_program_emit() 432 OUT_PKT4(ring, REG_A5XX_HLSQ_HS_CONSTLEN, 2); in fd5_program_emit() 436 OUT_PKT4(ring, REG_A5XX_HLSQ_DS_CONSTLEN, 2); in fd5_program_emit() 440 OUT_PKT4(ring, REG_A5XX_HLSQ_GS_CONSTLEN, 2); in fd5_program_emit() [all …]
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D | fd5_draw.c | 55 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl() 59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl() 250 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in fd5_clear() 253 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); in fd5_clear() 257 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_COLOR_DW0, 4); in fd5_clear() 278 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1); in fd5_clear() 281 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); in fd5_clear() 285 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_COLOR_DW0, 1); in fd5_clear() 292 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1); in fd5_clear()
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D | fd5_emit.h | 98 OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5); in fd5_cache_flush() 150 OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); in fd5_emit_render_cntl()
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/external/mesa3d/src/gallium/drivers/freedreno/ |
D | freedreno_util.h | 307 OUT_PKT4(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt) in OUT_PKT4() function 418 OUT_PKT4(ring, reg, 1); in emit_marker5()
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