Searched refs:OffsetB (Results 1 – 8 of 8) sorted by relevance
/external/llvm/lib/Analysis/ |
D | TypeBasedAliasAnalysis.cpp | 545 uint64_t OffsetA = TagA.getOffset(), OffsetB = TagB.getOffset(); in PathAliases() local 549 return OffsetA == OffsetB; in PathAliases() 565 return OffsetA == OffsetB; in PathAliases() 570 T = T.getParent(OffsetB); in PathAliases()
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D | LoopAccessAnalysis.cpp | 1020 APInt OffsetA(PtrBitWidth, 0), OffsetB(PtrBitWidth, 0); in isConsecutiveAccess() local 1022 PtrB = PtrB->stripAndAccumulateInBoundsConstantOffsets(DL, OffsetB); in isConsecutiveAccess() 1026 const SCEV *OffsetSCEVB = SE.getConstant(OffsetB); in isConsecutiveAccess()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.cpp | 106 int64_t OffsetA = 0, OffsetB = 0; in areMemAccessesTriviallyDisjoint() local 109 getMemOpBaseRegImmOfsWidth(MIb, BaseRegB, OffsetB, WidthB, TRI)) { in areMemAccessesTriviallyDisjoint() 111 int LowOffset = std::min(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint() 112 int HighOffset = std::max(OffsetA, OffsetB); in areMemAccessesTriviallyDisjoint()
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/external/swiftshader/third_party/subzero/src/ |
D | IceOperand.cpp | 49 RelocOffsetT OffsetB = B.Offset; in operator ==() local 59 OffsetB += B.OffsetExpr[i]->getOffset(); in operator ==() 65 return OffsetA == OffsetB; in operator ==()
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/external/llvm/lib/Transforms/Vectorize/ |
D | LoadStoreVectorizer.cpp | 248 APInt OffsetA(PtrBitWidth, 0), OffsetB(PtrBitWidth, 0); in isConsecutiveAccess() local 250 PtrB = PtrB->stripAndAccumulateInBoundsConstantOffsets(DL, OffsetB); in isConsecutiveAccess() 252 APInt OffsetDelta = OffsetB - OffsetA; in isConsecutiveAccess()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 661 int64_t OffsetA = 0, OffsetB = 0; in areMemAccessesTriviallyDisjoint() local 677 getMemOpBaseRegImmOfsWidth(MIb, BaseRegB, OffsetB, WidthB, TRI)) { in areMemAccessesTriviallyDisjoint() 679 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in areMemAccessesTriviallyDisjoint() 680 int HighOffset = OffsetA < OffsetB ? OffsetB : OffsetA; in areMemAccessesTriviallyDisjoint()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 1334 int WidthB, int OffsetB) { in offsetsDoNotOverlap() argument 1335 int LowOffset = OffsetA < OffsetB ? OffsetA : OffsetB; in offsetsDoNotOverlap() 1336 int HighOffset = OffsetA < OffsetB ? OffsetB : OffsetA; in offsetsDoNotOverlap()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 1628 int OffsetA = 0, OffsetB = 0; in areMemAccessesTriviallyDisjoint() local 1646 unsigned BaseRegB = getBaseAndOffset(&MIb, OffsetB, SizeB); in areMemAccessesTriviallyDisjoint() 1655 if (OffsetA > OffsetB) { in areMemAccessesTriviallyDisjoint() 1656 uint64_t offDiff = (uint64_t)((int64_t)OffsetA - (int64_t)OffsetB); in areMemAccessesTriviallyDisjoint() 1658 } else if (OffsetA < OffsetB) { in areMemAccessesTriviallyDisjoint() 1659 uint64_t offDiff = (uint64_t)((int64_t)OffsetB - (int64_t)OffsetA); in areMemAccessesTriviallyDisjoint()
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