| /external/valgrind/auxprogs/ |
| D | DotToScc.hs | 90 deScc :: (Ord a) =>
104 deDepthFirstSearch :: (Ord a) =>
126 deSpanningSearch :: (Ord a) =>
163 unMkSet :: (Ord a) => Set a -> [a]
170 utSetEmpty :: (Ord a) => Set a
177 utSetIsEmpty :: (Ord a) => Set a -> Bool
184 utSetSingleton :: (Ord a) => a -> Set a
191 utSetFromList :: (Ord a) => [a] -> Set a
202 utSetToList :: (Ord a) => Set a -> [a]
210 utSetUnion :: (Ord a) => Set a -> Set a -> Set a
[all …]
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| /external/protobuf/python/google/protobuf/ |
| D | text_encoding.py | 76 Ord = ord if isinstance(text, six.string_types) else lambda x: x
78 return ''.join(_cescape_utf8_to_str[Ord(c)] for c in text)
79 return ''.join(_cescape_byte_to_str[Ord(c)] for c in text)
|
| /external/antlr/antlr-3.4/runtime/Delphi/Sources/Antlr3.Runtime.Tests/ |
| D | Antlr.Runtime.Tests.pas | 117 CheckEquals(Ord('e'), Stream.LA(1));
121 CheckEquals(Ord('O'), Stream.LA(1));
127 CheckEquals(Ord('n'), Stream.LA(1));
133 CheckEquals(Ord('e'), Stream.LA(1));
|
| /external/antlr/antlr-3.4/runtime/Delphi/Sources/Antlr3.Runtime/ |
| D | Antlr.Runtime.Tree.pas | 3893 if ((FC >= Ord('a')) and (FC <= Ord('z')))
3894 or ((FC >= Ord('A')) and (FC <= Ord('Z')))
3895 or (FC = Ord('_'))
3899 while ((FC >= Ord('a')) and (FC <= Ord('z')))
3900 or ((FC >= Ord('A')) and (FC <= Ord('Z')))
3901 or ((FC >= Ord('0')) and (FC <= Ord('9')))
3902 or (FC = Ord('_')) do
3910 if (FC = Ord('(')) then
3916 if (FC = Ord(')')) then
3922 if (FC = Ord('%')) then
[all …]
|
| /external/icu/icu4c/source/data/lang/ |
| D | ga.txt | 7 collation{"Ord Sórtála"}
658 big5han{"Ord sórtála Síneach traidisiúnta - Big5"}
661 ducet{"Ord Sórtála Réamhshocraithe Unicode"}
664 gb2312han{"Ord sórtála Síneach simplithe - GB 2312"}
665 phonebook{"Ord sórtála an eolaire teileafóin"}
666 pinyin{"Ord sórtála pinyin"}
670 standard{"Ord Sórtála Caighdeánach"}
671 stroke{"Ord sórtála stríce"}
672 traditional{"Ord sórtála traidisiúnta"}
|
| D | mg.txt | 45 ur{"Ordò"}
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 441 AtomicOrdering Ord) const override;
443 Value *Addr, AtomicOrdering Ord) const override;
447 Instruction* emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
449 Instruction* emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
|
| /external/swiftshader/third_party/subzero/crosstest/ |
| D | test_fcmp.def | 29 X(Ord) \
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 255 AtomicOrdering Ord) const override;
257 Value *Addr, AtomicOrdering Ord) const override;
|
| D | HexagonGenInsert.cpp | 361 OrderedRegisterList(const RegisterOrdering &RO) : Ord(RO) {} in OrderedRegisterList()
383 const RegisterOrdering &Ord; member in __anonbb6efd570711::OrderedRegisterList
411 iterator L = std::lower_bound(Seq.begin(), Seq.end(), VR, Ord); in insert()
420 iterator L = std::lower_bound(Seq.begin(), Seq.end(), VR, Ord); in remove()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1157 AtomicOrdering Ord) const { in emitLoadLinked() argument
1164 Value *Addr, AtomicOrdering Ord) const { in emitStoreConditional() argument
1199 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() argument
1201 if (isReleaseOrStronger(Ord) && IsStore) in emitLeadingFence()
1202 return Builder.CreateFence(Ord); in emitLeadingFence()
1208 AtomicOrdering Ord, bool IsStore, in emitTrailingFence() argument
1210 if (isAcquireOrStronger(Ord)) in emitTrailingFence()
1211 return Builder.CreateFence(Ord); in emitTrailingFence()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8664.def | 28 X(Ord, 1, 0, Br_np, Br_None, 0, Cmpps_ord) \
|
| D | IceTargetLoweringX8632.def | 28 X(Ord, 1, 0, Br_np, Br_None, 0, Cmpps_ord) \
|
| D | IceTargetLoweringARM32.def | 43 X(Ord , VC , kNone, ge , gt , false, false) \
|
| D | IceInst.def | 79 X(Ord, "ord") \
|
| D | IceConverter.cpp | 482 Cond = Ice::InstFcmp::Ord; in convertFCmpInstruction()
|
| /external/llvm/test/tools/llvm-objdump/ |
| D | coff-private-headers.test | 7 IMPORT-NEXT: Hint/Ord Name
|
| /external/spirv-llvm/lib/SPIRV/ |
| D | SPIRVToOCL20.cpp | 362 [](unsigned Ord) { return mapSPIRVMemOrderToOCL(Ord); }); in visitCallSPIRVAtomicBuiltin() argument
|
| D | OCL20ToSPIRV.cpp | 797 [](unsigned Ord) { in transAtomicBuiltin() argument
798 return mapOCLMemSemanticToSPIRV(0, static_cast<OCLMemOrderKind>(Ord)); in transAtomicBuiltin()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 347 AtomicOrdering Ord) const override;
349 Value *Addr, AtomicOrdering Ord) const override;
|
| D | AArch64A57FPLoadBalancing.cpp | 534 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID)); in scavengeRegister() local
535 for (auto Reg : Ord) { in scavengeRegister()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 577 Instruction* emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
579 Instruction* emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord,
|
| /external/icu/icu4c/source/data/locales/ |
| D | fr_CA.txt | 572 "Ord.",
602 "Ord.",
|
| /external/llvm/lib/DebugInfo/CodeView/ |
| D | SymbolDumper.cpp | 112 W.printEnum("Ordinal", Thunk.Header.Ord, getThunkOrdinalNames()); in visitThunk32Sym()
|
| /external/llvm/bindings/ocaml/llvm/ |
| D | llvm_ocaml.c | 2056 LLVMValueRef Val, value Ord, in llvm_build_atomicrmw_native() argument
2060 Ptr, Val, Int_val(Ord), Bool_val(ST)); in llvm_build_atomicrmw_native()
|