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Searched refs:PKT3 (Results 1 – 25 of 27) sorted by relevance

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/external/mesa3d/src/amd/vulkan/
Dradv_cs.h46 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); in radeon_set_config_reg_seq()
60 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); in radeon_set_context_reg_seq()
77 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0)); in radeon_set_context_reg_idx()
86 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); in radeon_set_sh_reg_seq()
100 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); in radeon_set_uconfig_reg_seq()
116 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0)); in radeon_set_uconfig_reg_idx()
Dradv_query.c253 radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); in radv_CmdCopyQueryPoolResults()
267 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in radv_CmdCopyQueryPoolResults()
293 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in radv_CmdCopyQueryPoolResults()
347 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in radv_CmdBeginQuery()
380 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in radv_CmdEndQuery()
387 radeon_emit(cs, PKT3(PKT3_OCCLUSION_QUERY, 3, 0)); in radv_CmdEndQuery()
401 radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0)); in radv_CmdEndQuery()
429 radeon_emit(cs, PKT3(PKT3_RELEASE_MEM, 5, 0)); in radv_CmdWriteTimestamp()
437 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); in radv_CmdWriteTimestamp()
445 radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0)); in radv_CmdWriteTimestamp()
Dsi_cmd_buffer.c222 radeon_emit(cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); in si_init_config()
649 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); in si_emit_cache_flush()
665 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_emit_cache_flush()
670 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_emit_cache_flush()
677 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_emit_cache_flush()
680 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_emit_cache_flush()
686 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_emit_cache_flush()
692 radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_emit_cache_flush()
701 radeon_emit(cmd_buffer->cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); in si_emit_cache_flush()
710 radeon_emit(cmd_buffer->cs, PKT3(PKT3_ACQUIRE_MEM, 5, 0) | in si_emit_cache_flush()
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Dradv_cmd_buffer.c292 radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0)); in radv_cmd_buffer_trace_emit()
299 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in radv_cmd_buffer_trace_emit()
761 radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 2 + reg_count, 0)); in radv_set_depth_clear_regs()
791 radeon_emit(cmd_buffer->cs, PKT3(PKT3_COPY_DATA, 4, 0)); in radv_load_depth_clear_regs()
800 radeon_emit(cmd_buffer->cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); in radv_load_depth_clear_regs()
818 radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 4, 0)); in radv_set_color_clear_regs()
846 radeon_emit(cmd_buffer->cs, PKT3(PKT3_COPY_DATA, 4, 0)); in radv_load_color_clear_regs()
855 radeon_emit(cmd_buffer->cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); in radv_load_color_clear_regs()
1962 radeon_emit(cmd_buffer->cs, PKT3(PKT3_NUM_INSTANCES, 0, 0)); in radv_CmdDraw()
1965 radeon_emit(cmd_buffer->cs, PKT3(PKT3_DRAW_INDEX_AUTO, 1, 0)); in radv_CmdDraw()
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Dradv_meta_buffer.c533 radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 2 + words, 0)); in radv_CmdUpdateBuffer()
Dradv_device.c794 radeon_emit(device->empty_cs[family], PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); in radv_CreateDevice()
799 radeon_emit(device->empty_cs[family], PKT3(PKT3_NOP, 0, 0)); in radv_CreateDevice()
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_cs.h126 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_reloc()
135 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); in radeon_set_config_reg_seq()
149 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); in radeon_set_context_reg_seq()
165 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0)); in radeon_set_context_reg_idx()
174 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0)); in radeon_set_sh_reg_seq()
188 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0)); in radeon_set_uconfig_reg_seq()
204 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0)); in radeon_set_uconfig_reg_idx()
Dr600_streamout.c174 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_vgt_streamout()
177 radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); in r600_flush_vgt_streamout()
226 radeon_emit(cs, PKT3(PKT3_STRMOUT_BASE_UPDATE, 1, 0)); in r600_emit_streamout_begin()
240 radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0)); in r600_emit_streamout_begin()
252 radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0)); in r600_emit_streamout_begin()
263 radeon_emit(cs, PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0)); in r600_emit_streamout_begin()
283 radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0)); in r600_emit_streamout_end()
Dr600_query.c588 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_hw_do_emit_start()
597 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_hw_do_emit_start()
607 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_hw_do_emit_start()
664 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_hw_do_emit_stop()
676 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_hw_do_emit_stop()
693 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_hw_do_emit_stop()
784 radeon_emit(cs, PKT3(PKT3_SET_PREDICATION, 1, 0)); in r600_emit_query_predication()
1637 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0)); in r600_query_init_backend_mask()
Dr600_pipe_common.c115 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); in r600_gfx_write_event_eop()
123 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0)); in r600_gfx_write_event_eop()
154 radeon_emit(cs, PKT3(PKT3_WAIT_REG_MEM, 5, 0)); in r600_gfx_wait_fence()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_hw_context.c122 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_emit()
136 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_emit()
142 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_emit()
156 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_emit()
230 radeon_emit(cs, PKT3(PKT3_SURFACE_SYNC, 3, 0)); in r600_flush_emit()
238 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_emit()
242 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in r600_flush_emit()
383 radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); in r600_emit_pfp_sync_me()
410 radeon_emit(cs, PKT3(PKT3_MEM_WRITE, 3, 0)); in r600_emit_pfp_sync_me()
416 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_pfp_sync_me()
[all …]
Dr600_pipe.h780 #define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT… macro
803 cb->buf[cb->num_dw++] = PKT3(PKT3_SET_CONFIG_REG, num, 0); in r600_store_config_reg_seq()
815 cb->buf[cb->num_dw++] = PKT3(PKT3_SET_CONTEXT_REG, num, 0) | cb->pkt_flags; in r600_store_context_reg_seq()
827 cb->buf[cb->num_dw++] = PKT3(PKT3_SET_CTL_CONST, num, 0) | cb->pkt_flags; in r600_store_ctl_const_seq()
835 cb->buf[cb->num_dw++] = PKT3(PKT3_SET_LOOP_CONST, num, 0); in r600_store_loop_const_seq()
847 cb->buf[cb->num_dw++] = PKT3(PKT3_SET_LOOP_CONST, num, 0) | cb->pkt_flags; in eg_store_loop_const_seq()
895 radeon_emit(cs, PKT3(PKT3_SET_CTL_CONST, num, 0)); in radeon_set_ctl_const_seq()
Devergreen_hw_context.c131 radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0)); in evergreen_cp_dma_clear_buffer()
138 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in evergreen_cp_dma_clear_buffer()
Dr600_state.c1365 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_framebuffer_state()
1378 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_framebuffer_state()
1391 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_framebuffer_state()
1415 radeon_emit(cs, PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0)); in r600_emit_framebuffer_state()
1438 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_framebuffer_state()
1452 radeon_emit(cs, PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0)); in r600_emit_framebuffer_state()
1536 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_db_state()
1655 radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 7, 0)); in r600_emit_vertex_buffers()
1667 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_vertex_buffers()
1700 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_constant_buffers()
[all …]
Devergreen_state.c1574 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */ in evergreen_emit_framebuffer_state()
1577 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */ in evergreen_emit_framebuffer_state()
1580 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C7C_CB_COLOR0_CMASK */ in evergreen_emit_framebuffer_state()
1583 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C84_CB_COLOR0_FMASK */ in evergreen_emit_framebuffer_state()
1620 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028048_DB_Z_READ_BASE */ in evergreen_emit_framebuffer_state()
1623 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_02804C_DB_STENCIL_READ_BASE */ in evergreen_emit_framebuffer_state()
1626 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028050_DB_Z_WRITE_BASE */ in evergreen_emit_framebuffer_state()
1629 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028054_DB_STENCIL_WRITE_BASE */ in evergreen_emit_framebuffer_state()
1730 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in evergreen_emit_db_state()
1811 radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 8, 0) | pkt_flags); in evergreen_emit_vertex_buffers()
[all …]
Dr600_state_common.c1874 radeon_emit(cs, PKT3(PKT3_NUM_INSTANCES, 0, 0)); in r600_draw_vbo()
1886 radeon_emit(cs, PKT3(EG_PKT3_SET_BASE, 2, 0)); in r600_draw_vbo()
1891 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_draw_vbo()
1899 radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); in r600_draw_vbo()
1907 radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_IMMD, 1 + size_dw, render_cond_bit)); in r600_draw_vbo()
1915 radeon_emit(cs, PKT3(PKT3_DRAW_INDEX, 3, render_cond_bit)); in r600_draw_vbo()
1920 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_draw_vbo()
1929 radeon_emit(cs, PKT3(EG_PKT3_INDEX_BASE, 1, 0)); in r600_draw_vbo()
1933 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_draw_vbo()
1939 radeon_emit(cs, PKT3(EG_PKT3_INDEX_BUFFER_SIZE, 0, 0)); in r600_draw_vbo()
[all …]
Devergreen_compute.c490 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */ in compute_emit_cs()
493 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */ in compute_emit_cs()
536 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in compute_emit_cs()
724 r600_store_value(cb, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); in evergreen_init_atom_start_compute_cs()
729 r600_store_value(cb, PKT3(PKT3_EVENT_WRITE, 0, 0)); in evergreen_init_atom_start_compute_cs()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_draw.c552 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in si_emit_draw_packets()
569 radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); in si_emit_draw_packets()
612 radeon_emit(cs, PKT3(PKT3_NUM_INSTANCES, 0, 0)); in si_emit_draw_packets()
640 radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0)); in si_emit_draw_packets()
657 radeon_emit(cs, PKT3(PKT3_INDEX_BASE, 1, 0)); in si_emit_draw_packets()
661 radeon_emit(cs, PKT3(PKT3_INDEX_BUFFER_SIZE, 0, 0)); in si_emit_draw_packets()
666 radeon_emit(cs, PKT3(info->indexed ? PKT3_DRAW_INDEX_INDIRECT in si_emit_draw_packets()
687 radeon_emit(cs, PKT3(info->indexed ? PKT3_DRAW_INDEX_INDIRECT_MULTI : in si_emit_draw_packets()
706 radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_2, 4, render_cond_bit)); in si_emit_draw_packets()
713 radeon_emit(cs, PKT3(PKT3_DRAW_INDEX_AUTO, 1, render_cond_bit)); in si_emit_draw_packets()
[all …]
Dsi_perfcounter.c570 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in si_pc_emit_start()
580 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_pc_emit_start()
597 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_pc_emit_stop()
599 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0)); in si_pc_emit_stop()
626 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in si_pc_emit_read()
639 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in si_pc_emit_read()
Dsi_cp_dma.c80 radeon_emit(cs, PKT3(PKT3_DMA_DATA, 5, 0)); in si_emit_cp_dma()
90 radeon_emit(cs, PKT3(PKT3_CP_DMA, 4, 0)); in si_emit_cp_dma()
104 radeon_emit(cs, PKT3(PKT3_PFP_SYNC_ME, 0, 0)); in si_emit_cp_dma()
Dsi_pm4.c50 PKT3(state->last_opcode, count, predicate) in si_pm4_cmd_end()
153 radeon_emit(cs, PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0)); in si_pm4_emit()
Dsi_compute.c613 radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0)); in si_setup_tgsi_grid()
659 radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0) | in si_emit_dispatch_packets()
665 radeon_emit(cs, PKT3(PKT3_DISPATCH_INDIRECT, 1, render_cond_bit) | in si_emit_dispatch_packets()
670 radeon_emit(cs, PKT3(PKT3_DISPATCH_DIRECT, 3, render_cond_bit) | in si_emit_dispatch_packets()
Dsi_descriptors.c147 radeon_emit(sctx->ce_ib, PKT3(PKT3_DUMP_CONST_RAM, 3, 0)); in si_ce_upload()
174 radeon_emit(ib, PKT3(PKT3_LOAD_CONST_RAM, 3, 0)); in si_ce_reinitialize_descriptors()
196 radeon_emit(ib, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); in si_ce_enable_loads()
226 PKT3(PKT3_WRITE_CONST_RAM, count, 0)); in si_upload_descriptors()
1821 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, 2, 0)); in si_emit_shader_pointer()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_cs.c278 cs->base.buf[cs->base.cdw++] = PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0); in radv_amdgpu_cs_grow()
408 parent->base.buf[parent->base.cdw++] = PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0); in radv_amdgpu_cs_execute_secondary()
541 cs->base.buf[cs->base.cdw + 0] = PKT3(PKT3_INDIRECT_BUFFER_CIK, 2, 0); in radv_amdgpu_winsys_cs_submit_chained()
/external/mesa3d/src/amd/common/
Dr600d_common.h40 #define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT… macro

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