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Searched refs:Q24 (Results 1 – 8 of 8) sorted by relevance

/external/libxaac/decoder/
Dixheaacd_constants.h44 #define Q24 16777216 macro
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp141 case AArch64::Q24: in isOdd()
DAArch64RegisterInfo.td379 def Q24 : AArch64Reg<24, "q24", [D24], ["v24", ""]>, DwarfRegAlias<B24>;
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp1251 case AArch64::Q23: Reg = AArch64::Q24; break; in getNextVectorRegister()
1252 case AArch64::Q24: Reg = AArch64::Q25; break; in getNextVectorRegister()
/external/valgrind/memcheck/
Dmc_machine.c1023 if (o >= GOF(Q24) && o+sz <= GOF(Q24)+SZB(Q24)) return GOF(Q24); in get_otrack_shadow_offset_wrk()
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp260 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
440 AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp1881 .Case("v24", AArch64::Q24) in matchVectorRegName()
/external/lisa/ipynb/sched_tune/
Dstune_juno_taskonly_rampL.ipynb246 …b569LmJddVNSLGm99lr77gKAadNsUKlg\nycnWZTo52RLYZ5/1rysstGM9/DAwY4a1uObn27q//Q24/npg/nwbbGrECCsdycio…