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Searched refs:RBX (Results 1 – 25 of 57) sorted by relevance

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/external/llvm/test/tools/llvm-objdump/
Dwin64-unwind-data.test16 OBJ-NEXT: Frame register: RBX
20 OBJ-NEXT: 0x0f: UOP_PushNonVol RBX
65 EXE-NEXT: Frame register: RBX
69 EXE-NEXT: 0x0f: UOP_PushNonVol RBX
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp108 X86::SIL, X86::DIL, X86::BPL, X86::SPL, X86::RAX, X86::RBX, in initLLVMToSEHAndCVRegMapping()
299 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
311 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
348 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
384 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
420 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
421 return X86::RBX; in getX86SubSuperRegisterOrZero()
DX86AsmBackend.cpp499 case X86::RBX: in PushInstrSize()
682 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86RegisterInfo.cpp82 case X86::EBX: case X86::RBX: return 1; in getCompactUnwindRegNum()
361 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCalleeSavedRegs()
365 X86::RAX, X86::RDX, X86::RBX, X86::R12, in getCalleeSavedRegs()
370 X86::RBX, X86::RBP, X86::RDI, X86::RSI, in getCalleeSavedRegs()
675 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
687 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
724 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
760 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
796 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegister()
797 return X86::RBX; in getX86SubSuperRegister()
DX86RegisterInfo.td127 def RBX : RegisterWithSubRegs<"rbx", [EBX]>, DwarfRegNum<[3, -2, -2]>;
277 // List call-clobbered registers before callee-save registers. RBX, RBP, (and
314 RBX, R14, R15, R12, R13, RBP, RSP, RIP)> {
347 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)> {
387 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)> {
DX86GenRegisterInfo.inc126 RBX = 107,
252 const unsigned BH_Overlaps[] = { X86::BH, X86::BX, X86::EBX, X86::RBX, 0 };
253 const unsigned BL_Overlaps[] = { X86::BL, X86::BX, X86::EBX, X86::RBX, 0 };
256 const unsigned BX_Overlaps[] = { X86::BX, X86::BH, X86::BL, X86::EBX, X86::RBX, 0 };
293 const unsigned EBX_Overlaps[] = { X86::EBX, X86::BH, X86::BL, X86::BX, X86::RBX, 0 };
355 const unsigned RBX_Overlaps[] = { X86::RBX, X86::BH, X86::BL, X86::BX, X86::EBX, 0 };
495 const unsigned BH_SuperRegsSet[] = { X86::BX, X86::EBX, X86::RBX, 0 };
496 const unsigned BL_SuperRegsSet[] = { X86::BX, X86::EBX, X86::RBX, 0 };
499 const unsigned BX_SuperRegsSet[] = { X86::EBX, X86::RBX, 0 };
510 const unsigned EBX_SuperRegsSet[] = { X86::RBX, 0 };
[all …]
/external/libunwind/src/x86_64/
Dinit.h52 c->dwarf.loc[RBX] = REG_INIT_LOC(c, rbx, RBX); in common_init()
DGget_save_loc.c40 case UNW_X86_64_RBX: loc = c->dwarf.loc[RBX]; break; in unw_get_save_loc()
Dunwind_i.h42 #define RBX 3 macro
DGregs.c108 case UNW_X86_64_RBX: loc = c->dwarf.loc[RBX]; break; in tdep_access_reg()
DGos-freebsd.c114 c->dwarf.loc[RBX] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RBX, 0); in unw_handle_signal_frame()
/external/strace/linux/x86_64/
Duserent.h6 XLAT(8*RBX),
/external/kernel-headers/original/uapi/asm-x86/asm/
Dptrace-abi.h38 #define RBX 40 macro
/external/valgrind/coregrind/m_sigframe/
Dsigframe-amd64-darwin.c104 SC2(__rbx,RBX); in synthesize_ucontext()
132 SC2(RBX,__rbx); in restore_from_ucontext()
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h164 ENTRY(RBX) \
182 ENTRY(RBX) \
/external/llvm/lib/Target/X86/
DX86CallingConv.td233 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9,
373 CCIfType<[i64], CCAssignToReg<[RBX, R12, RBP, R15,
463 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
856 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
863 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
888 def CSR_64_MostRegs : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10,
912 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
916 def CSR_Win64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI,
928 def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RDI, RSI, R14, R15,
DX86RegisterInfo.td132 def RBX : X86Reg<"rbx", 3, [EBX]>, DwarfRegNum<[3, -2, -2]>;
317 // List call-clobbered registers before callee-save registers. RBX, RBP, (and
350 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
373 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>;
396 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
DX86ExpandPseudo.cpp214 Opcode == X86::LCMPXCHG8B_SAVE_EBX ? X86::EBX : X86::RBX; in ExpandMI()
/external/lzma/Asm/x86/
D7zAsm.asm69 r3 equ RBX
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h174 ENTRY(RBX) \
192 ENTRY(RBX) \
/external/capstone/arch/X86/
DX86DisassemblerDecoder.h187 ENTRY(RBX) \
205 ENTRY(RBX) \
/external/google-breakpad/src/common/android/
Dbreakpad_getcontext_unittest.cc132 CHECK_REG(RBX); in TEST()
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dghc-cc64.ll8 @r1 = external global i64 ; assigned to register: RBX
/external/llvm/test/CodeGen/X86/
Dbase-pointer-and-cmpxchg.ll22 ; Make sure the base pointer is saved before the RBX argument for
Dghc-cc64.ll8 @r1 = external global i64 ; assigned to register: RBX

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