Searched refs:RC_MASK_XYZ (Results 1 – 8 of 8) sorted by relevance
564 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()565 srcmasks[1] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()572 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()593 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()618 srcmasks[0] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()619 srcmasks[1] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()620 srcmasks[2] |= RC_MASK_XYZ; in rc_compute_sources_for_writemask()
311 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()333 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()342 inst_frc->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()353 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()361 inst_mad->U.I.SrcReg[2].Negate = RC_MASK_XYZ; in radeonTransformTEX()368 inst_add->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()374 inst_add->U.I.SrcReg[1].Negate = RC_MASK_XYZ; in radeonTransformTEX()388 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()419 inst_mov->U.I.DstReg.WriteMask = RC_MASK_XYZ; in radeonTransformTEX()
90 *needrgb = (inst->DstReg.WriteMask & RC_MASK_XYZ) ? 1 : 0; in classify_instruction()293 inst->DstReg.WriteMask & RC_MASK_XYZ; in set_pair_instruction()303 pair->RGB.WriteMask |= inst->DstReg.WriteMask & RC_MASK_XYZ; in set_pair_instruction()
152 #define RC_MASK_XYZ (RC_MASK_X|RC_MASK_Y|RC_MASK_Z) macro
183 if (matchmask == (mask & RC_MASK_XYZ)) in r300_swizzle_split()
266 inst_mul->U.I.DstReg.WriteMask = RC_MASK_XYZ; in rc_transform_fragment_wpos()281 inst_mad->U.I.DstReg.WriteMask = RC_MASK_XYZ; in rc_transform_fragment_wpos()
123 if (inst->RGB.Src[src].Used && (refmasks[src] & RC_MASK_XYZ)) in reads_pair()125 refmasks[src] & RC_MASK_XYZ); in reads_pair()
352 if (mask & RC_MASK_XYZ) in rc_source_type_mask()