Searched refs:RETS (Results 1 – 8 of 8) sorted by relevance
| /external/syslinux/com32/lua/src/ |
| D | lobject.c | 246 #define RETS "..." macro
266 addstr(out, RETS, LL(RETS)); in luaO_chunkid()
267 bufflen -= LL(RETS); in luaO_chunkid()
274 bufflen -= LL(PRE RETS POS) + 1; /* save space for prefix+suffix+'\0' */ in luaO_chunkid()
282 addstr(out, RETS, LL(RETS)); in luaO_chunkid()
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/MCTargetDesc/ |
| D | BlackfinMCTargetDesc.cpp | 42 InitBlackfinMCRegisterInfo(X, BF::RETS); in createBlackfinMCRegisterInfo()
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinRegisterInfo.td | 172 def RETS : Ri<4, 7, "rets">, DwarfRegNum<[35]>;
246 A0X, A0W, A1X, A1W, ASTAT, RETS,
275 def yCons : RegisterClass<"BF", [i32], 32, (add RETS, RETN, RETI, RETX,
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| D | BlackfinRegisterInfo.cpp | 39 : BlackfinGenRegisterInfo(BF::RETS), Subtarget(st), TII(tii) {} in BlackfinRegisterInfo()
75 Reserved.set(RETS); in getReservedRegs()
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| D | BlackfinFrameLowering.cpp | 80 .addReg(BF::RETS, RegState::Kill); in emitPrologue()
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| D | Blackfin.td | 65 "Possible RETS Register Corruption when Subroutine Is under 5 Cycles">;
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| D | BlackfinInstrInfo.td | 169 Defs = [R0, R1, R2, R3, P0, P1, P2, LB0, LB1, LC0, LC1, RETS, ASTAT] in {
179 Uses = [RETS] in
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| /external/ltp/testcases/kernel/syscalls/ptrace/ |
| D | ptrace04.c | 43 R(RETS) R(PC) R(RETX) R(RETN) R(RETE)
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