| /external/llvm/test/MC/Mips/ |
| D | sort-relocation-table.s | 90 # R_MIPS_HI16's match the same R_MIPS_LO16.
98 # CHECK-NEXT: 0x8 R_MIPS_LO16 sym1
101 # CHECK-NEXT: 0xC R_MIPS_LO16 sym1
104 # HILO 6: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.
124 # R_MIPS_HI16's therefore match different R_MIPS_LO16's.
143 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
146 # HILO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.
154 # CHECK-NEXT: 0x0 R_MIPS_LO16 sym1
155 # CHECK-NEXT: 0x4 R_MIPS_LO16 sym1
158 # HILO 9: R_MIPS_HI16's don't need a matching R_MIPS_LO16 to immediately follow
[all …]
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| D | cpsetup.s | 38 # N32-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE __gnu_local_gp
39 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror
66 # N32-NEXT: R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE __gnu_local_gp
67 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror
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| D | got-rel-expr.s | 14 # CHECK: 00000004: R_MIPS_LO16 .data
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| D | cpload.s | 22 # OBJ-O32: R_MIPS_LO16 _gp_disp
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| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| D | fp_const_pool.ll | 35 ; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$80000000
40 ; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$8000000000000000
70 ; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$7fc00000
72 ; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$7fc00000
74 ; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$ffc00000
76 ; MIPS32: lwc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$float$ffc00000
78 ; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$7ff8000000000000
80 ; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$7ff8000000000000
82 ; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$fff8000000000000
84 ; MIPS32: ldc1 {{.*}},0([[REG]]) {{.*}}: R_MIPS_LO16 .L$double$fff8000000000000
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| D | arith.ll | 281 ; MIPS32: addiu [[REG]],[[REG]],{{.*}} R_MIPS_LO16 G
295 ; MIPS32: addiu [[REG]],[[REG]],{{.*}} R_MIPS_LO16 G
309 ; MIPS32: addiu [[REG]],[[REG]],{{.*}} R_MIPS_LO16 G
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| D | vector-arg.ll | 489 ; MIPS32: lwc1 $f0,0(v0) 3b4: R_MIPS_LO16 .L$float$40000000
500 ; MIPS32: ldc1 $f0,0(v0) 3e0: R_MIPS_LO16 .L$double$4008000000000000
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsELFObjectWriter.cpp | 137 return ELF::R_MIPS_LO16; in getMatchingLoType()
147 return ELF::R_MIPS_LO16; in getMatchingLoType()
293 return ELF::R_MIPS_LO16; in getRelocType()
325 Type = setRType3((unsigned)ELF::R_MIPS_LO16, Type); in getRelocType()
511 case ELF::R_MIPS_LO16: in needsRelocateWithSymbol()
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| /external/llvm/test/ExecutionEngine/RuntimeDyld/Mips/ |
| D | ELF_O32_PIC_relocations.s | 51 # rtdyld-check: decode_operand(R_MIPS_LO16, 1)[15:0] = foo[15:0]
52 R_MIPS_LO16: label
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| /external/llvm/test/Object/ |
| D | objdump-relocations.test | 54 ELF-MIPSEL: R_MIPS_LO16 _gp_disp
56 ELF-MIPSEL: R_MIPS_LO16 $.str
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| D | obj2yaml.test | 216 ELF-MIPSEL-NEXT: Type: R_MIPS_LO16
222 ELF-MIPSEL-NEXT: Type: R_MIPS_LO16
|
| /external/llvm/include/llvm/Support/ELFRelocs/ |
| D | Mips.def | 12 ELF_RELOC(R_MIPS_LO16, 6)
|
| /external/swiftshader/third_party/llvm-subzero/include/llvm/Support/ELFRelocs/ |
| D | Mips.def | 12 ELF_RELOC(R_MIPS_LO16, 6)
|
| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| D | RuntimeDyldELF.cpp | 529 case ELF::R_MIPS_LO16: in resolveMIPSRelocation()
665 case ELF::R_MIPS_LO16: in evaluateMIPS64Relocation()
757 case ELF::R_MIPS_LO16: in applyMIPS64Relocation()
1178 return ELF::R_MIPS_LO16; in getMatchingLoRelocation()
1181 return ELF::R_MIPS_LO16; in getMatchingLoRelocation()
1413 ELF::R_MIPS_LO16, Value.Addend); in processRelocationRef()
1432 } else if (RelType == ELF::R_MIPS_LO16 || RelType == ELF::R_MIPS_PCLO16) { in processRelocationRef()
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| /external/llvm/test/tools/llvm-readobj/ |
| D | reloc-types.test | 423 ELF-MIPS: Type: R_MIPS_LO16 (6)
475 ELF-MIPS64EL: Type: R_MIPS_LO16/R_MIPS_LO16/R_MIPS_LO16 (394758)
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| /external/swiftshader/third_party/LLVM/include/llvm/Support/ |
| D | ELF.h | 610 R_MIPS_LO16 = 6, enumerator
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.cpp | 595 Fixup->set_kind(llvm::ELF::R_MIPS_LO16); in createMIPS32Fixup()
621 case llvm::ELF::R_MIPS_LO16: in emit()
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| /external/llvm/test/tools/llvm-readobj/Inputs/ |
| D | relocs.py | 859 R_MIPS_LO16 = 6 variable in Relocs_Elf_Mips
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| /external/swiftshader/third_party/subzero/tests_lit/assembler/mips32/ |
| D | encoding_test_arith_fp.ll | 495 ; IASM-NEXT: .word 0xd4400000 # R_MIPS_LO16 [[LAB]]
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| /external/elfutils/libelf/ |
| D | elf.h | 1610 #define R_MIPS_LO16 6 /* Low 16 bit */ macro
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| /external/kmod/port-gnu/ |
| D | elf.h | 1609 #define R_MIPS_LO16 6 /* Low 16 bit */ macro
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| /external/valgrind/perf/ |
| D | tinycc.c | 1268 #define R_MIPS_LO16 6 /* Low 16 bit */ macro
|