| /external/valgrind/none/tests/mips64/ |
| D | shift_instructions.c | 10 SRA, SRAV, SRL, SRLV enumerator
18 for (op = DROTR; op <= SRLV; op++) { in main()
196 case SRLV: in main()
|
| /external/v8/src/mips/ |
| D | constants-mips.h | 417 SRLV = ((0U << 3) + 6), enumerator
929 FunctionFieldToBitNumber(SLLV) | FunctionFieldToBitNumber(SRLV) |
|
| D | disasm-mips.cc | 1077 case SRLV: in DecodeTypeRegisterSPECIAL()
|
| D | assembler-mips.cc | 1737 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV); in srlv()
1766 | (rd.code() << kRdShift) | (1 << kSaShift) | SRLV; in rotrv()
|
| D | simulator-mips.cc | 3718 case SRLV: in DecodeTypeRegisterSPECIAL()
|
| /external/v8/src/mips64/ |
| D | constants-mips64.h | 400 SRLV = ((0U << 3) + 6), enumerator
969 FunctionFieldToBitNumber(SRLV) | FunctionFieldToBitNumber(DSRLV) |
|
| D | disasm-mips64.cc | 1219 case SRLV: in DecodeTypeRegisterSPECIAL()
|
| D | assembler-mips64.cc | 1821 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV); in srlv()
1850 | (rd.code() << kRdShift) | (1 << kSaShift) | SRLV; in rotrv()
|
| D | simulator-mips64.cc | 3647 case SRLV: in DecodeTypeRegisterSPECIAL()
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_32.c | 332 EMIT_SHIFT(SRL, SRLV); in emit_single_op()
|
| D | sljitNativeMIPS_64.c | 427 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
|
| D | sljitNativeMIPS_common.c | 168 #define SRLV (HI(0) | LO(6)) macro
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1087 BuildMI(BB, dl, TII->get(Mips::SRLV), SrlRes) in EmitAtomicBinaryPartword()
1296 BuildMI(BB, dl, TII->get(Mips::SRLV), SrlRes) in EmitAtomicCmpSwapPartword()
|
| D | MipsInstrInfo.td | 676 def SRLV : LogicR_shift_rotate_reg<0x06, 0x00, "srlv", srl>;
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1771 Opcode = Mips::SRLV; in selectShift()
|
| D | MipsInstrInfo.td | 1728 def SRLV : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV, srl>,
2312 (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
|
| D | MipsISelLowering.cpp | 1382 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicBinaryPartword()
1627 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicCmpSwapPartword()
|
| D | Mips16InstrInfo.td | 1249 // Format: SRLV ry, rx MIPS16e
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3422 FirstShift = Mips::SRLV; in expandRotation()
3427 SecondShift = Mips::SRLV; in expandRotation()
|
| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 1533 33577901U, // SRLV
3247 0U, // SRLV
|
| D | MipsGenDisassemblerTables.inc | 469 /* 211 */ MCD_OPC_Decode, 236, 11, 18, // Opcode: SRLV
|
| /external/valgrind/none/tests/mips32/ |
| D | MIPS32int.stdout.exp-mips32-BE | 907 SRLV
|
| D | MIPS32int.stdout.exp-mips32-LE | 907 SRLV
|
| D | MIPS32int.stdout.exp-mips32r2-LE | 1385 SRLV
|
| D | MIPS32int.stdout.exp-mips32r2-BE | 1385 SRLV
|