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Searched refs:ST_IN (Results 1 – 6 of 6) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_mips_defs.h41 #define ST_IN static inline macro
55 ST_IN HReg hregMIPS_GPR16 ( Bool mode64 ) { return GPR(mode64, 16, 0, 0); } in hregMIPS_GPR16()
56 ST_IN HReg hregMIPS_GPR17 ( Bool mode64 ) { return GPR(mode64, 17, 1, 1); } in hregMIPS_GPR17()
57 ST_IN HReg hregMIPS_GPR18 ( Bool mode64 ) { return GPR(mode64, 18, 2, 2); } in hregMIPS_GPR18()
58 ST_IN HReg hregMIPS_GPR19 ( Bool mode64 ) { return GPR(mode64, 19, 3, 3); } in hregMIPS_GPR19()
59 ST_IN HReg hregMIPS_GPR20 ( Bool mode64 ) { return GPR(mode64, 20, 4, 4); } in hregMIPS_GPR20()
60 ST_IN HReg hregMIPS_GPR21 ( Bool mode64 ) { return GPR(mode64, 21, 5, 5); } in hregMIPS_GPR21()
61 ST_IN HReg hregMIPS_GPR22 ( Bool mode64 ) { return GPR(mode64, 22, 6, 6); } in hregMIPS_GPR22()
63 ST_IN HReg hregMIPS_GPR12 ( Bool mode64 ) { return GPR(mode64, 12, 7, 7); } in hregMIPS_GPR12()
64 ST_IN HReg hregMIPS_GPR13 ( Bool mode64 ) { return GPR(mode64, 13, 8, 8); } in hregMIPS_GPR13()
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Dhost_arm_defs.h42 #define ST_IN static inline macro
43 ST_IN HReg hregARM_R4 ( void ) { return mkHReg(False, HRcInt32, 4, 0); } in hregARM_R4()
44 ST_IN HReg hregARM_R5 ( void ) { return mkHReg(False, HRcInt32, 5, 1); } in hregARM_R5()
45 ST_IN HReg hregARM_R6 ( void ) { return mkHReg(False, HRcInt32, 6, 2); } in hregARM_R6()
46 ST_IN HReg hregARM_R7 ( void ) { return mkHReg(False, HRcInt32, 7, 3); } in hregARM_R7()
47 ST_IN HReg hregARM_R10 ( void ) { return mkHReg(False, HRcInt32, 10, 4); } in hregARM_R10()
48 ST_IN HReg hregARM_R11 ( void ) { return mkHReg(False, HRcInt32, 11, 5); } in hregARM_R11()
50 ST_IN HReg hregARM_R0 ( void ) { return mkHReg(False, HRcInt32, 0, 6); } in hregARM_R0()
51 ST_IN HReg hregARM_R1 ( void ) { return mkHReg(False, HRcInt32, 1, 7); } in hregARM_R1()
52 ST_IN HReg hregARM_R2 ( void ) { return mkHReg(False, HRcInt32, 2, 8); } in hregARM_R2()
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Dhost_amd64_defs.h49 #define ST_IN static inline macro
50 ST_IN HReg hregAMD64_RSI ( void ) { return mkHReg(False, HRcInt64, 6, 0); } in hregAMD64_RSI()
51 ST_IN HReg hregAMD64_RDI ( void ) { return mkHReg(False, HRcInt64, 7, 1); } in hregAMD64_RDI()
52 ST_IN HReg hregAMD64_R8 ( void ) { return mkHReg(False, HRcInt64, 8, 2); } in hregAMD64_R8()
53 ST_IN HReg hregAMD64_R9 ( void ) { return mkHReg(False, HRcInt64, 9, 3); } in hregAMD64_R9()
54 ST_IN HReg hregAMD64_R12 ( void ) { return mkHReg(False, HRcInt64, 12, 4); } in hregAMD64_R12()
55 ST_IN HReg hregAMD64_R13 ( void ) { return mkHReg(False, HRcInt64, 13, 5); } in hregAMD64_R13()
56 ST_IN HReg hregAMD64_R14 ( void ) { return mkHReg(False, HRcInt64, 14, 6); } in hregAMD64_R14()
57 ST_IN HReg hregAMD64_R15 ( void ) { return mkHReg(False, HRcInt64, 15, 7); } in hregAMD64_R15()
58 ST_IN HReg hregAMD64_RBX ( void ) { return mkHReg(False, HRcInt64, 3, 8); } in hregAMD64_RBX()
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Dhost_ppc_defs.h46 #define ST_IN static inline macro
60 ST_IN HReg hregPPC_GPR3 ( Bool mode64 ) { return GPR(mode64, 3, 0, 0); } in hregPPC_GPR3()
61 ST_IN HReg hregPPC_GPR4 ( Bool mode64 ) { return GPR(mode64, 4, 1, 1); } in hregPPC_GPR4()
62 ST_IN HReg hregPPC_GPR5 ( Bool mode64 ) { return GPR(mode64, 5, 2, 2); } in hregPPC_GPR5()
63 ST_IN HReg hregPPC_GPR6 ( Bool mode64 ) { return GPR(mode64, 6, 3, 3); } in hregPPC_GPR6()
64 ST_IN HReg hregPPC_GPR7 ( Bool mode64 ) { return GPR(mode64, 7, 4, 4); } in hregPPC_GPR7()
65 ST_IN HReg hregPPC_GPR8 ( Bool mode64 ) { return GPR(mode64, 8, 5, 5); } in hregPPC_GPR8()
66 ST_IN HReg hregPPC_GPR9 ( Bool mode64 ) { return GPR(mode64, 9, 6, 6); } in hregPPC_GPR9()
67 ST_IN HReg hregPPC_GPR10 ( Bool mode64 ) { return GPR(mode64, 10, 7, 7); } in hregPPC_GPR10()
71 ST_IN HReg hregPPC_GPR11 ( Bool mode64 ) { return GPR(mode64, 11, 0, 8); } in hregPPC_GPR11()
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Dhost_arm64_defs.h41 #define ST_IN static inline macro
42 ST_IN HReg hregARM64_X22 ( void ) { return mkHReg(False, HRcInt64, 22, 0); } in hregARM64_X22()
43 ST_IN HReg hregARM64_X23 ( void ) { return mkHReg(False, HRcInt64, 23, 1); } in hregARM64_X23()
44 ST_IN HReg hregARM64_X24 ( void ) { return mkHReg(False, HRcInt64, 24, 2); } in hregARM64_X24()
45 ST_IN HReg hregARM64_X25 ( void ) { return mkHReg(False, HRcInt64, 25, 3); } in hregARM64_X25()
46 ST_IN HReg hregARM64_X26 ( void ) { return mkHReg(False, HRcInt64, 26, 4); } in hregARM64_X26()
47 ST_IN HReg hregARM64_X27 ( void ) { return mkHReg(False, HRcInt64, 27, 5); } in hregARM64_X27()
48 ST_IN HReg hregARM64_X28 ( void ) { return mkHReg(False, HRcInt64, 28, 6); } in hregARM64_X28()
50 ST_IN HReg hregARM64_X0 ( void ) { return mkHReg(False, HRcInt64, 0, 7); } in hregARM64_X0()
51 ST_IN HReg hregARM64_X1 ( void ) { return mkHReg(False, HRcInt64, 1, 8); } in hregARM64_X1()
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Dhost_x86_defs.h49 #define ST_IN static inline macro
50 ST_IN HReg hregX86_EAX ( void ) { return mkHReg(False, HRcInt32, 0, 0); } in hregX86_EAX()
51 ST_IN HReg hregX86_EBX ( void ) { return mkHReg(False, HRcInt32, 3, 1); } in hregX86_EBX()
52 ST_IN HReg hregX86_ECX ( void ) { return mkHReg(False, HRcInt32, 1, 2); } in hregX86_ECX()
53 ST_IN HReg hregX86_EDX ( void ) { return mkHReg(False, HRcInt32, 2, 3); } in hregX86_EDX()
54 ST_IN HReg hregX86_ESI ( void ) { return mkHReg(False, HRcInt32, 6, 4); } in hregX86_ESI()
55 ST_IN HReg hregX86_EDI ( void ) { return mkHReg(False, HRcInt32, 7, 5); } in hregX86_EDI()
57 ST_IN HReg hregX86_FAKE0 ( void ) { return mkHReg(False, HRcFlt64, 0, 6); } in hregX86_FAKE0()
58 ST_IN HReg hregX86_FAKE1 ( void ) { return mkHReg(False, HRcFlt64, 1, 7); } in hregX86_FAKE1()
59 ST_IN HReg hregX86_FAKE2 ( void ) { return mkHReg(False, HRcFlt64, 2, 8); } in hregX86_FAKE2()
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