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Searched refs:SchedModel (Results 1 – 25 of 50) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DTargetSchedule.h35 MCSchedModel SchedModel; variable
47 …TargetSchedModel(): SchedModel(MCSchedModel::GetDefaultSchedModel()), STI(nullptr), TII(nullptr) {} in TargetSchedModel()
70 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } in getMCSchedModel()
91 unsigned getProcessorID() const { return SchedModel.getProcessorID(); } in getProcessorID()
94 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
102 return SchedModel.getNumProcResourceKinds(); in getNumProcResourceKinds()
107 return SchedModel.getProcResource(PIdx); in getProcResource()
114 return SchedModel.getProcResource(PIdx)->Name; in getResourceName()
149 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } in getMicroOpBufferSize()
154 return SchedModel.getProcResource(PIdx)->BufferSize; in getResourceBufferSize()
DScheduleDAGInstrs.h106 TargetSchedModel SchedModel; variable
243 const TargetSchedModel *getSchedModel() const { return &SchedModel; } in getSchedModel()
247 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) in getSchedClass()
248 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); in getSchedClass()
DMachineScheduler.h565 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
581 const TargetSchedModel *SchedModel; variable
651 DAG(nullptr), SchedModel(nullptr), Rem(nullptr), Available(ID, Name+".A"), in SchedBoundary()
700 return RetiredMOps * SchedModel->getMicroOpFactor(); in getCriticalCount()
708 return std::max(CurrCycle * SchedModel->getLatencyFactor(), in getExecutedCount()
855 const TargetSchedModel *SchedModel);
860 const TargetSchedModel *SchedModel; variable
866 Context(C), SchedModel(nullptr), TRI(nullptr) {} in GenericSchedulerBase()
DMachineTraceMetrics.h74 TargetSchedModel SchedModel; variable
381 unsigned Factor = SchedModel.getLatencyFactor(); in getCycles()
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp31 return EnableSchedModel && SchedModel.hasInstrSchedModel(); in hasInstrSchedModel()
56 SchedModel = sm; in init()
61 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init()
63 ResourceLCM = SchedModel.IssueWidth; in init()
65 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; in init()
69 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
71 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; in init()
106 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
117 SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
159 return TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
[all …]
DMachineScheduler.cpp1786 init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) { in init() argument
1788 if (!SchedModel->hasInstrSchedModel()) in init()
1790 RemainingCounts.resize(SchedModel->getNumProcResourceKinds()); in init()
1794 RemIssueCount += SchedModel->getNumMicroOps(I->getInstr(), SC) in init()
1795 * SchedModel->getMicroOpFactor(); in init()
1797 PI = SchedModel->getWriteProcResBegin(SC), in init()
1798 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in init()
1800 unsigned Factor = SchedModel->getResourceFactor(PIdx); in init()
1810 SchedModel = smodel; in init()
1812 if (SchedModel->hasInstrSchedModel()) { in init()
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DMachineTraceMetrics.cpp60 SchedModel.init(ST.getSchedModel(), &ST, TII); in runOnMachineFunction()
63 SchedModel.getNumProcResourceKinds()); in runOnMachineFunction()
96 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getResources()
107 if (!SchedModel.hasInstrSchedModel()) in getResources()
109 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); in getResources()
114 PI = SchedModel.getWriteProcResBegin(SC), in getResources()
115 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { in getResources()
126 PRCycles[K] * SchedModel.getResourceFactor(K); in getResources()
135 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getProcResourceCycles()
148 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in Ensemble()
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DMachineCombiner.cpp41 MCSchedModel SchedModel; member in __anon08301b970111::MachineCombiner
297 const MCSchedClassDesc *SC = SchedModel.getSchedClassDesc(Idx); in instr2instrSC()
456 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
457 TSchedModel.init(SchedModel, &STI, TII); in runOnMachineFunction()
DScheduleDAGInstrs.cpp101 SchedModel.init(ST.getSchedModel(), &ST, TII); in ScheduleDAGInstrs()
314 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse, in addPhysRegDataDeps()
353 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps()
462 Dep.setLatency(SchedModel.computeOperandLatency(MI, OperIdx, Use, in addVRegDefDeps()
506 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
659 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
669 if (SchedModel.hasInstrSchedModel()) { in initSUnits()
672 PI = SchedModel.getWriteProcResBegin(SC), in initSUnits()
673 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { in initSUnits()
674 switch (SchedModel.getProcResource(PI->ProcResourceIdx)->BufferSize) { in initSUnits()
DTargetInstrInfo.cpp1028 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel &SchedModel, in defaultDefLatency() argument
1033 return SchedModel.LoadLatency; in defaultDefLatency()
1035 return SchedModel.HighLatency; in defaultDefLatency()
1054 bool TargetInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel, in hasLowDefLatency() argument
1057 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency()
1088 return defaultDefLatency(ItinData->SchedModel, DefMI); in computeDefOperandLatency()
1119 defaultDefLatency(ItinData->SchedModel, DefMI)); in computeOperandLatency()
DEarlyIfConversion.cpp592 MCSchedModel SchedModel; member in __anon9ba1b0650211::EarlyIfConverter
700 unsigned CritLimit = SchedModel.MispredictPenalty/2; in shouldConvertIf()
798 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
/external/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.h46 const TargetSchedModel *SchedModel; variable
57 : SchedModel(SM), TotalPackets(0) { in VLIWResourceModel()
64 Packet.resize(SchedModel->getIssueWidth()); in VLIWResourceModel()
134 const TargetSchedModel *SchedModel; member
155 DAG(nullptr), SchedModel(nullptr), Available(ID, Name+".A"), in VLIWSchedBoundary()
168 SchedModel = smodel; in init()
191 const TargetSchedModel *SchedModel; variable
206 : DAG(nullptr), SchedModel(nullptr), Top(TopQID, "TopQ"), in ConvergingVLIWScheduler()
DHexagonMachineScheduler.cpp130 if (Packet.size() >= SchedModel->getIssueWidth()) { in reserveResources()
204 SchedModel = DAG->getSchedModel(); in initialize()
206 Top.init(DAG, SchedModel); in initialize()
207 Bot.init(DAG, SchedModel); in initialize()
281 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
282 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
304 unsigned Width = SchedModel->getIssueWidth(); in bumpCycle()
347 IssueCount += SchedModel->getNumMicroOps(SU->getInstr()); in bumpNode()
/external/llvm/include/llvm/Target/
DTargetSchedule.td177 // SchedModel ties these units to a processor for any stand-alone defs
179 // attached to a processor, so SchedModel is not needed.
185 SchedMachineModel SchedModel = ?;
200 SchedMachineModel SchedModel = ?;
238 // SchedModel silences warnings but is ignored.
242 SchedMachineModel SchedModel = ?;
247 // SchedModel ties these resources to a processor.
258 SchedMachineModel SchedModel = ?;
301 // type at the same time. This class is unaware of its SchedModel so
308 // SchedModel ties these resources to a processor.
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DTargetSubtargetInfo.h119 const TargetSchedModel *SchedModel) const { in resolveSchedClass() argument
DTargetInstrInfo.h1266 unsigned defaultDefLatency(const MCSchedModel &SchedModel,
1280 virtual bool hasHighOperandLatency(const TargetSchedModel &SchedModel, in hasHighOperandLatency() argument
1290 virtual bool hasLowDefLatency(const TargetSchedModel &SchedModel,
/external/llvm/lib/Target/AArch64/
DAArch64StorePairSuppress.cpp33 TargetSchedModel SchedModel; member in __anon91ca37840111::AArch64StorePairSuppress
83 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
125 SchedModel.init(ST.getSchedModel(), &ST, TII); in runOnMachineFunction()
131 if (!SchedModel.hasInstrSchedModel()) { in runOnMachineFunction()
DAArch64SchedKryo.td35 let SchedModel = KryoModel in {
54 let SchedModel = KryoModel in {
133 } // SchedModel = KryoModel
DAArch64Schedule.td11 // const MachineInstr *MI and const TargetSchedModel *SchedModel
15 static_cast<const AArch64InstrInfo*>(SchedModel->getInstrInfo());
DAArch64ConditionalCompares.cpp723 MCSchedModel SchedModel; member in __anon5a9d51740211::AArch64ConditionalCompares
843 unsigned DelayLimit = SchedModel.MispredictPenalty * 3 / 4; in shouldConvert()
894 SchedModel = MF.getSubtarget().getSchedModel(); in runOnMachineFunction()
/external/llvm/include/llvm/MC/
DMCInstrItineraries.h111 MCSchedModel SchedModel; ///< Basic machine properties.
118 InstrItineraryData() : SchedModel(MCSchedModel::GetDefaultSchedModel()), in InstrItineraryData()
124 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F), in InstrItineraryData()
125 Itineraries(SchedModel.InstrItineraries) {} in InstrItineraryData()
/external/llvm/lib/Target/AMDGPU/
DSISchedule.td16 static_cast<const SIInstrInfo*>(SchedModel->getInstrInfo());
112 let SchedModel = SIFullSpeedModel in {
122 } // End SchedModel = SIFullSpeedModel
124 let SchedModel = SIQuarterSpeedModel in {
134 } // End SchedModel = SIQuarterSpeedModel
/external/llvm/lib/MC/
DMCSubtargetInfo.cpp102 const MCSchedModel SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
103 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU()
/external/llvm/lib/Target/ARM/
DARMSubtarget.cpp147 SchedModel = getSchedModelForCPU(CPUString); in initSubtargetFeatures()
279 return SchedModel.MispredictPenalty; in getMispredictionPenalty()
/external/llvm/lib/Target/Lanai/
DLanaiSchedule.td64 let SchedModel = LanaiSchedModel in {

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