Searched refs:SignBits (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineMulDivRem.cpp | 147 unsigned SignBits = in WillNotOverflowSignedMul() local
152 if (SignBits > BitWidth + 1) in WillNotOverflowSignedMul()
160 if (SignBits == BitWidth + 1) { in WillNotOverflowSignedMul()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1249 unsigned SignBits = std::min(LHSSignBits, RHSSignBits); in LowerDIVREM24() local
1250 unsigned DivBits = BitSize - SignBits; in LowerDIVREM24()
2660 unsigned SignBits = Signed ? (32 - WidthVal + 1) : (32 - WidthVal); in PerformDAGCombine() local
2663 if (OpSignBits >= SignBits) in PerformDAGCombine()
2966 unsigned SignBits = 32 - Width->getZExtValue() + 1; in ComputeNumSignBitsForTargetNode() local
2968 return SignBits; in ComputeNumSignBitsForTargetNode()
2972 return std::max(SignBits, Op0SignBits); in ComputeNumSignBitsForTargetNode()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 27401 unsigned SignBits[2] = {1, 1}; in canReduceVMulWidth() local
27412 SignBits[i] = 25; in canReduceVMulWidth()
27415 SignBits[i] = 17; in canReduceVMulWidth()
27422 SignBits[i] = 32; in canReduceVMulWidth()
27433 SignBits[i] = std::min(SignBits[i], IntVal.getNumSignBits()); in canReduceVMulWidth()
27436 SignBits[i] = DAG.ComputeNumSignBits(Opd); in canReduceVMulWidth()
27443 unsigned MinSignBits = std::min(SignBits[0], SignBits[1]); in canReduceVMulWidth()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 8575 std::vector<SDValue> SignBits(VT.getVectorNumElements(), SignBit); in LowerVSETCC() local
8576 SDValue SignVec = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &SignBits[0], in LowerVSETCC()
8577 SignBits.size()); in LowerVSETCC()
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