| /external/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.h | 42 unsigned SrcIdx; variable
61 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0), in CoalescerPair()
68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), in CoalescerPair()
109 unsigned getSrcIdx() const { return SrcIdx; } in getSrcIdx()
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| D | TwoAddressInstructionPass.cpp | 132 unsigned SrcIdx, unsigned DstIdx,
1211 unsigned SrcIdx, unsigned DstIdx, in tryInstructionTransform() argument
1218 unsigned regB = MI.getOperand(SrcIdx).getReg(); in tryInstructionTransform()
1227 bool Commuted = tryInstructionCommute(&MI, DstIdx, SrcIdx, regBKilled, Dist); in tryInstructionTransform()
1253 regB = MI.getOperand(SrcIdx).getReg(); in tryInstructionTransform()
1408 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { in collectTiedOperands() local
1410 if (!MI->isRegTiedToDefOperand(SrcIdx, &DstIdx)) in collectTiedOperands()
1413 MachineOperand &SrcMO = MI->getOperand(SrcIdx); in collectTiedOperands()
1427 if (const TargetRegisterClass *RC = TII->getRegClass(MCID, SrcIdx, in collectTiedOperands()
1435 TiedOperands[SrcReg].push_back(std::make_pair(SrcIdx, DstIdx)); in collectTiedOperands()
[all …]
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| D | RegisterCoalescer.cpp | 315 SrcIdx = DstIdx = 0; in setRegisters()
362 SrcIdx, DstIdx); in setRegisters()
367 SrcIdx = DstSub; in setRegisters()
384 if (DstIdx && !SrcIdx) { in setRegisters()
386 std::swap(SrcIdx, DstIdx); in setRegisters()
405 std::swap(SrcIdx, DstIdx); in flip()
429 assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state."); in isCoalescable()
443 return TRI.composeSubRegIndices(SrcIdx, SrcSub) == in isCoalescable()
885 unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx(); in reMaterializeTrivialDef() local
927 if (SrcIdx && DstIdx) in reMaterializeTrivialDef()
[all …]
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| D | TargetRegisterInfo.cpp | 299 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
302 SrcIdx, DefIdx) != nullptr; in shareSameRegisterFile()
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| D | PeepholeOptimizer.cpp | 1696 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast() local
1697 for (unsigned OpIdx = DefIdx + 1, EndOpIdx = SrcIdx; OpIdx != EndOpIdx; in getNextSourceFromBitcast()
1706 if (SrcIdx != EndOpIdx) in getNextSourceFromBitcast()
1709 SrcIdx = OpIdx; in getNextSourceFromBitcast()
1711 const MachineOperand &Src = Def->getOperand(SrcIdx); in getNextSourceFromBitcast()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | TwoAddressInstructionPass.cpp | 126 unsigned SrcIdx, unsigned DstIdx,
864 unsigned SrcIdx, unsigned DstIdx, unsigned Dist, in TryInstructionTransform() argument
868 unsigned regB = mi->getOperand(SrcIdx).getReg(); in TryInstructionTransform()
890 if (SrcIdx == SrcOp1) in TryInstructionTransform()
892 else if (SrcIdx == SrcOp2) in TryInstructionTransform()
1093 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { in runOnMachineFunction() local
1095 if (!mi->isRegTiedToDefOperand(SrcIdx, &DstIdx)) in runOnMachineFunction()
1104 assert(mi->getOperand(SrcIdx).isReg() && in runOnMachineFunction()
1105 mi->getOperand(SrcIdx).getReg() && in runOnMachineFunction()
1106 mi->getOperand(SrcIdx).isUse() && in runOnMachineFunction()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 215 int SrcIdx = getShuffleMask(SVI)[Elt->getZExtValue()]; in visitExtractElementInst() local
220 if (SrcIdx < 0) in visitExtractElementInst()
222 if (SrcIdx < (int)LHSWidth) in visitExtractElementInst()
225 SrcIdx -= LHSWidth; in visitExtractElementInst()
231 SrcIdx, false)); in visitExtractElementInst()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 108 int getSelIdx(unsigned Opcode, unsigned SrcIdx) const;
312 MachineOperand &getFlagOp(MachineInstr &MI, unsigned SrcIdx = 0,
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| D | R600InstrInfo.cpp | 262 int R600InstrInfo::getSelIdx(unsigned Opcode, unsigned SrcIdx) const { in getSelIdx()
278 if (getOperandIdx(Opcode, Row[0]) == (int)SrcIdx) { in getSelIdx()
323 int SrcIdx = getOperandIdx(MI.getOpcode(), OpTable[j][0]); in getSrcs() local
324 if (SrcIdx < 0) in getSrcs()
326 MachineOperand &MO = MI.getOperand(SrcIdx); in getSrcs()
1427 MachineOperand &R600InstrInfo::getFlagOp(MachineInstr &MI, unsigned SrcIdx, in getFlagOp() argument
1449 switch (SrcIdx) { in getFlagOp()
1466 switch (SrcIdx) { in getFlagOp()
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| D | R600ISelLowering.h | 94 bool FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src,
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| D | R600ISelLowering.cpp | 2169 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx, in FoldOperand() argument
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 229 int SrcIdx = SVI->getMaskValue(Elt->getZExtValue()); in visitExtractElementInst() local
234 if (SrcIdx < 0) in visitExtractElementInst()
236 if (SrcIdx < (int)LHSWidth) in visitExtractElementInst()
239 SrcIdx -= LHSWidth; in visitExtractElementInst()
245 SrcIdx, false)); in visitExtractElementInst()
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 1444 unsigned SrcIdx, MaskIdx; in EmitInstruction() local
1453 SrcIdx = 1; MaskIdx = 5; break; in EmitInstruction()
1457 SrcIdx = 2; MaskIdx = 6; break; in EmitInstruction()
1461 SrcIdx = 3; MaskIdx = 7; break; in EmitInstruction()
1467 const MachineOperand &SrcOp = MI->getOperand(SrcIdx); in EmitInstruction()
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| D | X86InstrInfo.cpp | 5692 unsigned SrcIdx = (Imm >> 6) & 3; in foldMemoryOperandCustom() local
5696 int PtrOffset = SrcIdx * 4; in foldMemoryOperandCustom()
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| D | X86ISelLowering.cpp | 8085 int SrcIdx = i + Offset; in lowerVectorShuffleAsSpecificZeroOrAnyExtend() local
8086 ShMask[i] = SafeOffset(SrcIdx) ? SrcIdx : -1; in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
25816 unsigned SrcIdx = (InsertPSMask >> 6) & 0x3; in combineTargetShuffle() local
25834 int M = TargetMask1[SrcIdx]; in combineTargetShuffle()
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| /external/llvm/lib/Analysis/ |
| D | DependenceAnalysis.cpp | 3351 for (GEPOperator::const_op_iterator SrcIdx = SrcGEP->idx_begin(), in depends() local
3354 SrcIdx != SrcEnd; in depends()
3355 ++SrcIdx, ++DstIdx, ++P) { in depends()
3356 Pair[P].Src = SE->getSCEV(*SrcIdx); in depends()
3781 for (GEPOperator::const_op_iterator SrcIdx = SrcGEP->idx_begin(), in getSplitIteration() local
3784 SrcIdx != SrcEnd; in getSplitIteration()
3785 ++SrcIdx, ++DstIdx, ++P) { in getSplitIteration()
3786 Pair[P].Src = SE->getSCEV(*SrcIdx); in getSplitIteration()
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| /external/llvm/lib/Transforms/Utils/ |
| D | SimplifyCFG.cpp | 3557 for (unsigned SrcIdx = 0, SrcE = SrcPN->getNumIncomingValues(); in removeEmptyCleanup() local
3558 SrcIdx != SrcE; ++SrcIdx) { in removeEmptyCleanup()
3559 DestPN->addIncoming(SrcPN->getIncomingValue(SrcIdx), in removeEmptyCleanup()
3560 SrcPN->getIncomingBlock(SrcIdx)); in removeEmptyCleanup()
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