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Searched refs:StackSlot (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/CodeGen/
DInlineSpiller.cpp123 void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
125 bool rmFromMergeableSpills(MachineInstr &Spill, int StackSlot);
147 int StackSlot; member in __anon8fa8dc2d0111::InlineSpiller
279 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
283 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
391 TII.storeRegToStackSlot(*MBB, MII, SrcReg, false, StackSlot, in hoistSpillInsideBB()
397 HSpiller.addToMergeableSpills(*MII, StackSlot, Original); in hoistSpillInsideBB()
450 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
456 if (HSpiller.rmFromMergeableSpills(MI, StackSlot)) in eliminateRedundantSpills()
665 if (InstrReg != Reg || FI != StackSlot) in coalesceStackAccess()
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DInlineSpiller.cpp70 int StackSlot; member in __anon845f99d90111::InlineSpiller
250 if (SnipLI.reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
254 if (SnipLI.reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet()
605 if (Reg == TII.isLoadFromStackSlot(MI, FI) && FI == StackSlot) { in traceSiblingValue()
725 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot, in hoistSpill()
729 VRM.addSpillSlotUse(StackSlot, MII); in hoistSpill()
783 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills()
993 if (InstrReg != Reg || FI != StackSlot) in coalesceStackAccess()
1041 : TII.foldMemoryOperand(MI, FoldOps, StackSlot); in foldMemoryOperand()
1046 VRM.addSpillSlotUse(StackSlot, FoldMI); in foldMemoryOperand()
[all …]
DVirtRegRewriter.cpp266 void ClobberSharingStackSlots(int StackSlot);
838 void AvailableSpills::ClobberSharingStackSlots(int StackSlot) { in ClobberSharingStackSlots() argument
840 SpillSlotsOrReMatsAvailable.find(StackSlot); in ClobberSharingStackSlots()
848 if (I->second != StackSlot) { in ClobberSharingStackSlots()
1143 int Idx, unsigned PhysReg, int StackSlot,
1601 int Idx, unsigned PhysReg, int StackSlot, in SpillRegToStackSlot() argument
1610 TII->storeRegToStackSlot(*MBB, llvm::next(MII), PhysReg, true, StackSlot, RC, in SpillRegToStackSlot()
1613 VRM->addSpillSlotUse(StackSlot, StoreMI); in SpillRegToStackSlot()
1652 Spills.ModifyStackSlotOrReMat(StackSlot); in SpillRegToStackSlot()
1654 Spills.addAvailable(StackSlot, PhysReg, isAvailable); in SpillRegToStackSlot()
[all …]
/external/v8/src/compiler/
Dmachine-operator.h598 const Operator* StackSlot(int size); in NON_EXPORTED_BASE()
599 const Operator* StackSlot(MachineRepresentation rep); in NON_EXPORTED_BASE()
Dmachine-operator.cc721 const Operator* MachineOperatorBuilder::StackSlot(int size) { in StackSlot() function in v8::internal::compiler::MachineOperatorBuilder
734 const Operator* MachineOperatorBuilder::StackSlot(MachineRepresentation rep) { in StackSlot() function in v8::internal::compiler::MachineOperatorBuilder
735 return StackSlot(1 << ElementSizeLog2Of(rep)); in StackSlot()
Dwasm-compiler.cc1457 graph()->NewNode(jsgraph()->machine()->StackSlot(input_type)); in BuildBitCountingCall()
1597 graph()->NewNode(jsgraph()->machine()->StackSlot(type.representation())); in BuildCFuncInstruction()
1613 jsgraph()->machine()->StackSlot(type.representation())); in BuildCFuncInstruction()
1668 jsgraph()->machine()->StackSlot(parameter_representation)); in BuildIntToFloatConversionInstruction()
1670 jsgraph()->machine()->StackSlot(result_type.representation())); in BuildIntToFloatConversionInstruction()
1767 jsgraph()->machine()->StackSlot(parameter_representation)); in BuildFloatToIntConversionInstruction()
1769 jsgraph()->machine()->StackSlot(result_type.representation())); in BuildFloatToIntConversionInstruction()
2183 jsgraph()->machine()->StackSlot(MachineRepresentation::kWord64)); in BuildDiv64Call()
2185 jsgraph()->machine()->StackSlot(MachineRepresentation::kWord64)); in BuildDiv64Call()
2963 : graph()->NewNode(jsgraph()->machine()->StackSlot( in BuildWasmInterpreterEntry()
Dint64-lowering.cc557 machine()->StackSlot(MachineRepresentation::kWord64)); in LowerNode()
590 machine()->StackSlot(MachineRepresentation::kWord64)); in LowerNode()
Draw-machine-assembler.h87 Node* StackSlot(MachineRepresentation rep) { in StackSlot() function
88 return AddNode(machine()->StackSlot(rep)); in StackSlot()
Dopcodes.h492 V(StackSlot) \
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp7612 SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); in LowerSINT_TO_FP() local
7614 StackSlot, in LowerSINT_TO_FP()
7617 return BuildFILD(Op, SrcVT, Chain, StackSlot, DAG); in LowerSINT_TO_FP()
7621 SDValue StackSlot, in BuildFILD() argument
7634 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(StackSlot); in BuildFILD()
7643 MMO = cast<LoadSDNode>(StackSlot)->getMemOperand(); in BuildFILD()
7644 StackSlot = StackSlot.getOperand(1); in BuildFILD()
7646 SDValue Ops[] = { Chain, StackSlot, DAG.getValueType(SrcVT) }; in BuildFILD()
7662 SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); in BuildFILD() local
7665 Chain, Result, StackSlot, DAG.getValueType(Op.getValueType()), InFlag in BuildFILD()
[all …]
DX86ISelLowering.h717 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
/external/swiftshader/third_party/subzero/src/
DIceInstX86BaseImpl.h2621 Address StackSlot = in emitIAS() local
2623 Asm->movss(Ty, StackSlot, Traits::getEncodedXmm(Var->getRegNum())); in emitIAS()
2624 Asm->fld(Ty, StackSlot); in emitIAS()
2703 Address StackSlot = in emitIAS() local
2705 Asm->fstp(Ty, StackSlot); in emitIAS()
2706 Asm->movss(Ty, Traits::getEncodedXmm(Dest->getRegNum()), StackSlot); in emitIAS()
/external/v8/src/crankshaft/
Dlithium.h22 V(StackSlot, STACK_SLOT, 128) \
/external/llvm/lib/Target/X86/
DX86ISelLowering.h988 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
DX86ISelLowering.cpp13380 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in LowerSINT_TO_FP() local
13382 DAG.getEntryNode(), dl, ValueToStore, StackSlot, in LowerSINT_TO_FP()
13385 return BuildFILD(Op, SrcVT, Chain, StackSlot, DAG); in LowerSINT_TO_FP()
13389 SDValue StackSlot, in BuildFILD() argument
13402 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(StackSlot); in BuildFILD()
13410 MMO = cast<LoadSDNode>(StackSlot)->getMemOperand(); in BuildFILD()
13411 StackSlot = StackSlot.getOperand(1); in BuildFILD()
13413 SDValue Ops[] = { Chain, StackSlot, DAG.getValueType(SrcVT) }; in BuildFILD()
13429 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in BuildFILD() local
13432 Chain, Result, StackSlot, DAG.getValueType(Op.getValueType()), InFlag in BuildFILD()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2274 SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64); in ExpandLegalINT_TO_FP() local
2278 StackSlot.getValueType()); in ExpandLegalINT_TO_FP()
2280 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP()
2281 SDValue Lo = DAG.getNode(ISD::ADD, dl, StackSlot.getValueType(), in ExpandLegalINT_TO_FP()
2282 StackSlot, WordOff); in ExpandLegalINT_TO_FP()
2306 SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot, in ExpandLegalINT_TO_FP()
DSelectionDAGBuilder.cpp2047 SDValue StackSlot = DAG.getLoad( in visitSPDescriptorParent() local
2063 Entry.Node = StackSlot; in visitSPDescriptorParent()
2096 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, Guard, StackSlot); in visitSPDescriptorParent()
2106 MVT::Other, StackSlot.getOperand(0), in visitSPDescriptorParent()
6721 SDValue StackSlot = in visitInlineAsm() local
6724 Chain, getCurSDLoc(), OpInfo.CallOperand, StackSlot, in visitInlineAsm()
6727 OpInfo.CallOperand = StackSlot; in visitInlineAsm()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp2460 SDValue StackSlot = DAG.CreateStackTemporary(MVT::f64); in ExpandLegalINT_TO_FP() local
2465 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP()
2467 TLI.getPointerTy(), StackSlot, WordOff); in ExpandLegalINT_TO_FP()
2491 SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot, in ExpandLegalINT_TO_FP()
DSelectionDAGBuilder.cpp5970 SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); in visitInlineAsm() local
5972 OpInfo.CallOperand, StackSlot, in visitInlineAsm()
5975 OpInfo.CallOperand = StackSlot; in visitInlineAsm()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp3765 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in LowerFLT_ROUNDS_() local
3767 StackSlot, MachinePointerInfo(), false, false,0); in LowerFLT_ROUNDS_()
3771 SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four); in LowerFLT_ROUNDS_()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp6895 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT); in LowerFLT_ROUNDS_() local
6897 StackSlot, MachinePointerInfo(), false, false,0); in LowerFLT_ROUNDS_()
6901 SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four); in LowerFLT_ROUNDS_()