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Searched refs:TGEU (Results 1 – 11 of 11) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.h450 TGEU = ((6U << 3) + 1), enumerator
939 FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) |
1283 case TGEU: in IsTrap()
Ddisasm-mips.cc429 case TGEU: in PrintCode()
1195 case TGEU: in DecodeTypeRegisterSPECIAL()
Dassembler-mips.cc2045 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift in tgeu()
Dsimulator-mips.cc3918 case TGEU: in DecodeTypeRegisterSPECIAL()
/external/v8/src/mips64/
Dconstants-mips64.h447 TGEU = ((6U << 3) + 1), enumerator
984 FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) |
1359 case TGEU: in IsTrap()
Ddisasm-mips64.cc445 case TGEU: in PrintCode()
1398 case TGEU: in DecodeTypeRegisterSPECIAL()
Dassembler-mips64.cc2297 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift in tgeu()
Dsimulator-mips64.cc3959 case TGEU: in DecodeTypeRegisterSPECIAL()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc1670 1107319530U, // TGEU
3384 0U, // TGEU
5389 // (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0)
DMipsGenDisassemblerTables.inc633 /* 896 */ MCD_OPC_Decode, 245, 12, 50, // Opcode: TGEU
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td1806 def TGEU : MMRel, TEQ_FT<"tgeu", GPR32Opnd, uimm10, II_TGEU>, TEQ_FM<0x31>, ISA_MIPS2;
2287 (TGEU GPR32Opnd:$rs, GPR32Opnd:$rt, 0), 1>, ISA_MIPS2;