Home
last modified time | relevance | path

Searched refs:VBIF (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMScheduleSwift.td545 "VSHL", "VSHR(s|u)", "VSHLL", "VQSHL", "VQSHLU", "VBIF",
DARMScheduleA9.td2402 // VADD/VAND/VORR/VEOR/VBIC/VORN/VBIT/VBIF/VBSL
DARMInstrNEON.td5084 // VBIF : Vector Bitwise Insert if False
5112 // VBIT/VBIF are not yet implemented. The TwoAddress pass will not go looking
8110 // VBIF, VBIT, and VBSL allow, but do not require, a type suffix.
/external/v8/src/arm/
Dassembler-arm.cc4136 enum BinaryBitwiseOp { VAND, VBIC, VBIF, VBIT, VBSL, VEOR, VORR, VORN }; enumerator
4147 case VBIF: in EncodeNeonBinaryBitwiseOp()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td3908 // VBIF : Vector Bitwise Insert if False
3936 // VBIT/VBIF are not yet implemented. The TwoAddress pass will not go looking
/external/valgrind/none/tests/arm/
Dneon128.stdout.exp165 ---- VBIF ----
Dneon64.stdout.exp227 ---- VBIF ----