Searched refs:VOP1 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/docs/ |
| D | AMDGPUUsage.rst | 101 VOP1, VOP2, VOP3, VOPC Instructions
107 VOP1, VOP2, and VOPC instructions based on the operands. If you want to force
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrFormats.td | 31 field bits<1> VOP1 = 0;
67 let TSFlags{10} = VOP1;
135 let VOP1 = 1;
642 class VOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> :
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| D | SIDefines.h | 28 VOP1 = 1 << 10, enumerator
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| D | SIInstrInfo.h | 248 return MI.getDesc().TSFlags & SIInstrFlags::VOP1; in isVOP1()
252 return get(Opcode).TSFlags & SIInstrFlags::VOP1; in isVOP1()
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| D | VIInstructions.td | 17 // VOP1 Instructions
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| D | CIInstructions.td | 29 // VOP1 Instructions
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| D | SIInstrInfo.td | 1140 !if (!eq(Src1.Value, untyped.Value), 1, // VOP1
1190 dag ret = !if(!eq(NumSrcArgs, 1), (ins Src0RC:$src0), // VOP1
1202 // VOP1 without input operands (V_NOP, V_CLREXCP)
1207 // VOP1 with modifiers
1211 // VOP1 without modifiers
1241 // VOP1 without input operands (V_NOP)
1274 // VOP1 without input operands (V_NOP)
1700 VOP1<op.SI, outs, ins, asm, []>,
1708 VOP1<op.VI, outs, ins, asm, []>,
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| D | SIInstructions.td | 1205 // VOP1 Instructions
1220 def V_READFIRSTLANE_B32 : VOP1 <
2468 // VOP1 Patterns
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| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 2679 cvtSDWA(Inst, Operands, SIInstrFlags::VOP1); in cvtSdwaVOP1()
2725 case SIInstrFlags::VOP1: { in cvtSDWA()
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