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Searched refs:VTST (Results 1 – 17 of 17) sorted by relevance

/external/arm-neon-tests/
Dref-rvct-neon-nofp16.txt4867 VTST/VTSTQ (signed input) output:
4868 VTST/VTSTQ:0:result_int8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
4869 VTST/VTSTQ:1:result_int16x4 [] = { 3333, 3333, 3333, 3333, }
4870 VTST/VTSTQ:2:result_int32x2 [] = { 33333333, 33333333, }
4871 VTST/VTSTQ:3:result_int64x1 [] = { 3333333333333333, }
4872 VTST/VTSTQ:4:result_uint8x8 [] = { 0, ff, ff, ff, ff, ff, ff, ff, }
4873 VTST/VTSTQ:5:result_uint16x4 [] = { 0, ffff, 0, ffff, }
4874 VTST/VTSTQ:6:result_uint32x2 [] = { 0, ffffffff, }
4875 VTST/VTSTQ:7:result_uint64x1 [] = { 3333333333333333, }
4876 VTST/VTSTQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
Dref-rvct-neon.txt5687 VTST/VTSTQ (signed input) output:
5688 VTST/VTSTQ:0:result_int8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
5689 VTST/VTSTQ:1:result_int16x4 [] = { 3333, 3333, 3333, 3333, }
5690 VTST/VTSTQ:2:result_int32x2 [] = { 33333333, 33333333, }
5691 VTST/VTSTQ:3:result_int64x1 [] = { 3333333333333333, }
5692 VTST/VTSTQ:4:result_uint8x8 [] = { 0, ff, ff, ff, ff, ff, ff, ff, }
5693 VTST/VTSTQ:5:result_uint16x4 [] = { 0, ffff, 0, ffff, }
5694 VTST/VTSTQ:6:result_uint32x2 [] = { 0, ffffffff, }
5695 VTST/VTSTQ:7:result_uint64x1 [] = { 3333333333333333, }
5696 VTST/VTSTQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
Dref-rvct-all.txt5687 VTST/VTSTQ (signed input) output:
5688 VTST/VTSTQ:0:result_int8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
5689 VTST/VTSTQ:1:result_int16x4 [] = { 3333, 3333, 3333, 3333, }
5690 VTST/VTSTQ:2:result_int32x2 [] = { 33333333, 33333333, }
5691 VTST/VTSTQ:3:result_int64x1 [] = { 3333333333333333, }
5692 VTST/VTSTQ:4:result_uint8x8 [] = { 0, ff, ff, ff, ff, ff, ff, ff, }
5693 VTST/VTSTQ:5:result_uint16x4 [] = { 0, ffff, 0, ffff, }
5694 VTST/VTSTQ:6:result_uint32x2 [] = { 0, ffffffff, }
5695 VTST/VTSTQ:7:result_uint64x1 [] = { 3333333333333333, }
5696 VTST/VTSTQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
Dexpected_input4gcc-nofp16.txt5108 VTST/VTSTQ (signed input) output:
5132 VTST/VTSTQ (unsigned input) output:
Dexpected_input4gcc.txt5496 VTST/VTSTQ (signed input) output:
5522 VTST/VTSTQ (unsigned input) output:
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.h107 VTST, // Vector test bits. enumerator
DARMInstrNEON.td60 def NEONvtst : SDNode<"ARMISD::VTST", SDTARMVCMP>;
3713 // VTST : Vector Test Bits
3714 defm VTST : N3V_QHS<0, 0, 0b1000, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q,
DARMISelLowering.cpp877 case ARMISD::VTST: return "ARMISD::VTST"; in getTargetNodeName()
3511 Opc = ARMISD::VTST; in LowerVSETCC()
/external/llvm/lib/Target/ARM/
DARMISelLowering.h106 VTST, // Vector test bits. enumerator
DARMScheduleSwift.td544 "VPADDL", "VAND", "VBIC", "VEOR", "VORN", "VORR", "VTST",
DARMScheduleA9.td2408 // VHADD/VRHADD/VQADD/VTST/VADH/VRADH
DARMInstrNEON.td505 def NEONvtst : SDNode<"ARMISD::VTST", SDTARMVCMP>;
4797 // VTST : Vector Test Bits
4798 defm VTST : N3V_QHS<0, 0, 0b1000, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q,
DARMISelLowering.cpp1181 case ARMISD::VTST: return "ARMISD::VTST"; in getTargetNodeName()
4958 Opc = ARMISD::VTST; in LowerVSETCC()
/external/v8/src/arm/
Dassembler-arm.cc4283 VTST, enumerator
4316 case VTST: in EncodeNeonBinOp()
4537 emit(EncodeNeonBinOp(VTST, size, dst, src1, src2)); in vtst()
/external/clang/include/clang/Basic/
Darm_neon.td566 def VTST : WInst<"vtst", "udd", "csiUcUsUiPcPsQcQsQiQUcQUsQUiQPcQPs">;
/external/valgrind/none/tests/arm/
Dneon128.stdout.exp1344 ---- VTST ----
Dneon64.stdout.exp1579 ---- VTST ----