| /external/v8/src/x64/ |
| D | codegen-x64.h | 39 Register base_reg,
44 : base_reg_(base_reg), in base_reg_() argument
52 Register base_reg,
57 : base_reg_(base_reg), in base_reg_() argument
65 Register base_reg,
70 : base_reg_(base_reg), in base_reg_() argument
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| D | code-stubs-x64.cc | 2992 Register base_reg = r15; in CallApiFunctionAndReturn() local
2993 __ Move(base_reg, next_address); in CallApiFunctionAndReturn()
2994 __ movp(prev_next_address_reg, Operand(base_reg, kNextOffset)); in CallApiFunctionAndReturn()
2995 __ movp(prev_limit_reg, Operand(base_reg, kLimitOffset)); in CallApiFunctionAndReturn()
2996 __ addl(Operand(base_reg, kLevelOffset), Immediate(1)); in CallApiFunctionAndReturn()
3044 __ subl(Operand(base_reg, kLevelOffset), Immediate(1)); in CallApiFunctionAndReturn()
3045 __ movp(Operand(base_reg, kNextOffset), prev_next_address_reg); in CallApiFunctionAndReturn()
3046 __ cmpp(prev_limit_reg, Operand(base_reg, kLimitOffset)); in CallApiFunctionAndReturn()
3115 __ movp(Operand(base_reg, kLimitOffset), prev_limit_reg); in CallApiFunctionAndReturn()
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| D | disasm-x64.cc | 347 int base_reg(int low_bits) { return low_bits | ((rex_ & 0x01) << 3); } in base_reg() function in disasm::DisassemblerX64
2313 NameOfCPURegister(base_reg(current & 0x07))); in InstructionDecode()
2318 NameOfCPURegister(base_reg(current & 0x07))); in InstructionDecode()
2343 NameOfCPURegister(base_reg(current & 0x07)), in InstructionDecode()
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| D | assembler-x64.cc | 224 int base_reg = (has_sib ? operand.buf_[1] : modrm) & 0x07; in Operand() local
227 bool is_baseless = (mode == 0) && (base_reg == 0x05); // No base or RIP base. in Operand()
247 } else if (disp_value != 0 || (base_reg == 0x05)) { in Operand()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_fs_reg_allocate.cpp | 217 for (int base_reg = j; in brw_alloc_reg_set() local
218 base_reg < j + (class_sizes[i] + 1) / 2; in brw_alloc_reg_set()
219 base_reg++) { in brw_alloc_reg_set()
220 ra_add_reg_conflict(regs, base_reg, reg); in brw_alloc_reg_set()
231 for (int base_reg = j; in brw_alloc_reg_set() local
232 base_reg < j + class_sizes[i]; in brw_alloc_reg_set()
233 base_reg++) { in brw_alloc_reg_set()
234 ra_add_reg_conflict(regs, base_reg, reg); in brw_alloc_reg_set()
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| D | brw_vec4_reg_allocate.cpp | 138 for (int base_reg = j; in brw_vec4_alloc_reg_set() local
139 base_reg < j + class_sizes[i]; in brw_vec4_alloc_reg_set()
140 base_reg++) { in brw_vec4_alloc_reg_set()
141 ra_add_reg_conflict(compiler->vec4_reg_set.regs, base_reg, reg); in brw_vec4_alloc_reg_set()
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| /external/mesa3d/src/util/ |
| D | register_allocate.c | 266 unsigned int base_reg, unsigned int reg) in ra_add_transitive_reg_conflict() argument
270 ra_add_reg_conflict(regs, reg, base_reg); in ra_add_transitive_reg_conflict()
272 for (i = 0; i < regs->regs[base_reg].num_conflicts; i++) { in ra_add_transitive_reg_conflict()
273 ra_add_reg_conflict(regs, reg, regs->regs[base_reg].conflict_list[i]); in ra_add_transitive_reg_conflict()
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| D | register_allocate.h | 54 unsigned int base_reg, unsigned int reg);
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_state_init.c | 426 uint32_t base_reg; in cube_emit_cs() local
439 case 1: base_reg = RADEON_PP_CUBIC_OFFSET_T1_0; break; in cube_emit_cs()
440 case 2: base_reg = RADEON_PP_CUBIC_OFFSET_T2_0; break; in cube_emit_cs()
442 case 0: base_reg = RADEON_PP_CUBIC_OFFSET_T0_0; break; in cube_emit_cs()
448 OUT_BATCH(CP_PACKET0(base_reg + (4 * j), 0)); in cube_emit_cs()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_cmd_buffer.c | 363 uint32_t base_reg = shader_stage_to_user_data_0(stage); in radv_emit_userdata_address() local
368 radeon_set_sh_reg_seq(cmd_buffer->cs, base_reg + loc->sgpr_idx * 4, 2); in radv_emit_userdata_address()
1005 uint32_t base_reg = shader_stage_to_user_data_0(stage); in emit_stage_descriptor_set_userdata() local
1013 base_reg + desc_set_loc->sgpr_idx * 4, 2); in emit_stage_descriptor_set_userdata()
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| /external/v8/src/s390/ |
| D | simulator-s390.cc | 6081 #define GET_ADDRESS(index_reg, base_reg, offset) \ argument
6083 (((base_reg) == 0) ? 0 : get_register(base_reg)) + offset
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