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Searched refs:conds (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/ilo/core/
Dilo_state_shader_ps.c46 struct ilo_state_ps_dispatch_conds conds; member
239 const struct ilo_state_ps_dispatch_conds *conds) in ps_params_get_gen6_kill_pixel() argument
268 return (conds->ps_may_kill || params->alpha_may_kill); in ps_params_get_gen6_kill_pixel()
274 const struct ilo_state_ps_dispatch_conds *conds) in ps_params_get_gen6_dispatch_enable() argument
288 ((conds->has_rt_write && params->has_writeable_rt) || in ps_params_get_gen6_dispatch_enable()
289 conds->write_odepth || in ps_params_get_gen6_dispatch_enable()
290 conds->write_ostencil || in ps_params_get_gen6_dispatch_enable()
291 conds->has_uav_write || in ps_params_get_gen6_dispatch_enable()
292 ps_params_get_gen6_kill_pixel(dev, params, conds) || in ps_params_get_gen6_dispatch_enable()
308 assert(conds->ps_valid); in ps_params_get_gen6_dispatch_enable()
[all …]
Dilo_state_shader.h211 } conds; member
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_tgsi_alu.c37 LLVMValueRef conds[TGSI_NUM_CHANNELS]; in kill_if_fetch_args() local
41 conds[i] = LLVMBuildFCmp(builder, LLVMRealOLT, value, in kill_if_fetch_args()
47 conds[i - 1] = LLVMBuildOr(builder, conds[i], conds[i - 1], ""); in kill_if_fetch_args()
52 emit_data->args[0] = LLVMBuildSelect(builder, conds[0], in kill_if_fetch_args()
/external/libxml2/
Dgentest.py737 conds = node.xpathEval("cond")
738 for cond in conds: