| /external/valgrind/VEX/priv/ |
| D | guest_arm64_defs.h | 142 void arm64g_dirtyhelper_SHA1C ( /*OUT*/V128* res, ULong dHi, ULong dLo,
148 void arm64g_dirtyhelper_SHA1M ( /*OUT*/V128* res, ULong dHi, ULong dLo,
151 void arm64g_dirtyhelper_SHA1P ( /*OUT*/V128* res, ULong dHi, ULong dLo,
154 void arm64g_dirtyhelper_SHA1SU0 ( /*OUT*/V128* res, ULong dHi, ULong dLo,
157 void arm64g_dirtyhelper_SHA1SU1 ( /*OUT*/V128* res, ULong dHi, ULong dLo,
160 void arm64g_dirtyhelper_SHA256H2 ( /*OUT*/V128* res, ULong dHi, ULong dLo,
163 void arm64g_dirtyhelper_SHA256H ( /*OUT*/V128* res, ULong dHi, ULong dLo,
166 void arm64g_dirtyhelper_SHA256SU0 ( /*OUT*/V128* res, ULong dHi, ULong dLo,
169 void arm64g_dirtyhelper_SHA256SU1 ( /*OUT*/V128* res, ULong dHi, ULong dLo,
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| D | guest_arm64_helpers.c | 1103 void arm64g_dirtyhelper_SHA1C ( /*OUT*/V128* res, ULong dHi, ULong dLo, in arm64g_dirtyhelper_SHA1C() argument
1108 V128 X; X.w64[1] = dHi; X.w64[0] = dLo; in arm64g_dirtyhelper_SHA1C()
1137 void arm64g_dirtyhelper_SHA1M ( /*OUT*/V128* res, ULong dHi, ULong dLo, in arm64g_dirtyhelper_SHA1M() argument
1142 V128 X; X.w64[1] = dHi; X.w64[0] = dLo; in arm64g_dirtyhelper_SHA1M()
1162 void arm64g_dirtyhelper_SHA1P ( /*OUT*/V128* res, ULong dHi, ULong dLo, in arm64g_dirtyhelper_SHA1P() argument
1167 V128 X; X.w64[1] = dHi; X.w64[0] = dLo; in arm64g_dirtyhelper_SHA1P()
1187 void arm64g_dirtyhelper_SHA1SU0 ( /*OUT*/V128* res, ULong dHi, ULong dLo, in arm64g_dirtyhelper_SHA1SU0() argument
1191 res->w64[0] = dHi; in arm64g_dirtyhelper_SHA1SU0()
1192 res->w64[1] ^= dHi ^ mHi; in arm64g_dirtyhelper_SHA1SU0()
1197 void arm64g_dirtyhelper_SHA1SU1 ( /*OUT*/V128* res, ULong dHi, ULong dLo, in arm64g_dirtyhelper_SHA1SU1() argument
[all …]
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| D | guest_amd64_defs.h | 155 ULong dHi, ULong dLo,
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| D | guest_amd64_toIR.c | 9953 IRTemp dHi = newTemp(Ity_I64); in math_PALIGNR_XMM() local
9958 assign( dHi, unop(Iop_V128HIto64, mkexpr(dV)) ); in math_PALIGNR_XMM()
9976 assign( rHi, dis_PALIGNR_XMM_helper(dHi, dLo, imm8-8) ); in math_PALIGNR_XMM()
9980 assign( rHi, mkexpr(dHi) ); in math_PALIGNR_XMM()
9984 assign( rHi, binop(Iop_Shr64, mkexpr(dHi), mkU8(8*(imm8-16))) ); in math_PALIGNR_XMM()
9985 assign( rLo, dis_PALIGNR_XMM_helper(dHi, dLo, imm8-16) ); in math_PALIGNR_XMM()
9989 assign( rLo, mkexpr(dHi) ); in math_PALIGNR_XMM()
9993 assign( rLo, binop(Iop_Shr64, mkexpr(dHi), mkU8(8*(imm8-24))) ); in math_PALIGNR_XMM()
11283 IRTemp sHi, sLo, dHi, dLo; in math_PMULUDQ_256() local
11284 sHi = sLo = dHi = dLo = IRTemp_INVALID; in math_PMULUDQ_256()
[all …]
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| D | host_arm_defs.c | 1332 ARMInstr* ARMInstr_VXferQ ( Bool toQ, HReg qD, HReg dHi, HReg dLo ) { in ARMInstr_VXferQ() argument
1337 i->ARMin.VXferQ.dHi = dHi; in ARMInstr_VXferQ()
1842 ppHRegARM(i->ARMin.VXferQ.dHi); in ppARMInstr()
1850 ppHRegARM(i->ARMin.VXferQ.dHi); in ppARMInstr()
2279 addHRegUse(u, HRmRead, i->ARMin.VXferQ.dHi); in getRegUsage_ARMInstr()
2283 addHRegUse(u, HRmWrite, i->ARMin.VXferQ.dHi); in getRegUsage_ARMInstr()
2519 i->ARMin.VXferQ.dHi = lookupHRegRemap(m, i->ARMin.VXferQ.dHi); in mapRegs_ARMInstr()
3802 UInt dHi = dregEnc(i->ARMin.VXferQ.dHi); in emit_ARMInstr() local
3819 vassert(qDhi != dHi && qDhi != dLo); in emit_ARMInstr()
3820 vassert(qDlo != dHi && qDlo != dLo); in emit_ARMInstr()
[all …]
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| D | host_arm_defs.h | 834 HReg dHi; member
1023 extern ARMInstr* ARMInstr_VXferQ ( Bool toQ, HReg qD, HReg dHi, HReg dLo );
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| D | guest_x86_toIR.c | 11057 IRTemp dHi = newTemp(Ity_I64); in disInstr_X86_WRK() local
11077 assign( dHi, mkIRExprCCall( in disInstr_X86_WRK()
11089 assign( dV, binop(Iop_64HLtoV128, mkexpr(dHi), mkexpr(dLo))) ; in disInstr_X86_WRK()
11256 IRTemp dHi = newTemp(Ity_I64); in disInstr_X86_WRK() local
11276 assign( dHi, mkIRExprCCall( in disInstr_X86_WRK()
11288 assign( dV, binop(Iop_64HLtoV128, mkexpr(dHi), mkexpr(dLo))) ; in disInstr_X86_WRK()
12291 IRTemp dHi = newTemp(Ity_I64); in disInstr_X86_WRK() local
12326 assign( dHi, unop(Iop_V128HIto64, mkexpr(dV)) ); in disInstr_X86_WRK()
12342 binop(opCatE,mkexpr(dHi),mkexpr(dLo)), in disInstr_X86_WRK()
12343 binop(opCatO,mkexpr(dHi),mkexpr(dLo)) in disInstr_X86_WRK()
[all …]
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| D | guest_amd64_helpers.c | 3765 ULong dHi, ULong dLo, in amd64g_calc_mpsadbw() argument
3787 dst = dHi & 0x00FFFFFFFFFFFFFFULL; in amd64g_calc_mpsadbw()
3795 dst = (dLo >> 32) | ((dHi & 0x00FFFFFFULL) << 32); in amd64g_calc_mpsadbw()
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| D | host_arm_isel.c | 4505 HReg dHi = iselNeon64Expr(env, e->Iex.Binop.arg1); in iselNeonExpr_wrk() local
4508 addInstr(env, ARMInstr_VXferQ(True/*toQ*/, res, dHi, dLo)); in iselNeonExpr_wrk()
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | invalid-UMAAL-arm.txt | 10 # if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-armv7.txt | 348 # if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
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