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Searched refs:dccRamBaseAlign (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/amd/addrlib/r800/
Dciaddrlib.cpp246 pOut->dccRamBaseAlign = pIn->tileInfo.banks * in HwlComputeDccInfo()
251 ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign)); in HwlComputeDccInfo()
253 if (0 == (pOut->dccRamSize & (pOut->dccRamBaseAlign - 1))) in HwlComputeDccInfo()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c259 surf->dcc_alignment = MAX2(surf->dcc_alignment, AddrDccOut->dccRamBaseAlign); in radv_compute_level()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c239 surf->dcc_alignment = MAX2(surf->dcc_alignment, AddrDccOut->dccRamBaseAlign); in compute_level()
/external/mesa3d/src/amd/addrlib/
Daddrinterface.h2140 UINT_64 dccRamBaseAlign; ///< Base alignment of dcc key member