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Searched refs:dma (Results 1 – 25 of 91) sorted by relevance

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/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_dma.c206 make_empty_list(&rmesa->dma.free); in radeon_init_dma()
207 make_empty_list(&rmesa->dma.wait); in radeon_init_dma()
208 make_empty_list(&rmesa->dma.reserved); in radeon_init_dma()
209 rmesa->dma.minimum_size = MAX_DMA_BUF_SZ; in radeon_init_dma()
217 if (size > rmesa->dma.minimum_size) in radeonRefillCurrentDmaRegion()
218 rmesa->dma.minimum_size = (size + 15) & (~15); in radeonRefillCurrentDmaRegion()
221 __func__, size, rmesa->dma.minimum_size); in radeonRefillCurrentDmaRegion()
223 if (is_empty_list(&rmesa->dma.free) in radeonRefillCurrentDmaRegion()
224 || last_elem(&rmesa->dma.free)->bo->size < size) { in radeonRefillCurrentDmaRegion()
230 0, rmesa->dma.minimum_size, 4, in radeonRefillCurrentDmaRegion()
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Dradeon_queryobj.c112 if (radeon->dma.flush) in radeonBeginQuery()
113 radeon->dma.flush(&radeon->glCtx); in radeonBeginQuery()
152 if (radeon->dma.flush) in radeonEndQuery()
153 radeon->dma.flush(&radeon->glCtx); in radeonEndQuery()
Dradeon_tcl.c149 if (rmesa->radeon.dma.flush) in radeonAllocElts()
150 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); in radeonAllocElts()
502 if ( rmesa->radeon.dma.flush ) in transition_to_hwtnl()
503 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); in transition_to_hwtnl()
505 rmesa->radeon.dma.flush = NULL; in transition_to_hwtnl()
Dradeon_ioctl.h93 if ( rmesa->radeon.dma.flush ) \
94 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \
/external/mesa3d/src/mesa/drivers/dri/r200/
Dradeon_dma.c206 make_empty_list(&rmesa->dma.free); in radeon_init_dma()
207 make_empty_list(&rmesa->dma.wait); in radeon_init_dma()
208 make_empty_list(&rmesa->dma.reserved); in radeon_init_dma()
209 rmesa->dma.minimum_size = MAX_DMA_BUF_SZ; in radeon_init_dma()
217 if (size > rmesa->dma.minimum_size) in radeonRefillCurrentDmaRegion()
218 rmesa->dma.minimum_size = (size + 15) & (~15); in radeonRefillCurrentDmaRegion()
221 __func__, size, rmesa->dma.minimum_size); in radeonRefillCurrentDmaRegion()
223 if (is_empty_list(&rmesa->dma.free) in radeonRefillCurrentDmaRegion()
224 || last_elem(&rmesa->dma.free)->bo->size < size) { in radeonRefillCurrentDmaRegion()
230 0, rmesa->dma.minimum_size, 4, in radeonRefillCurrentDmaRegion()
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Dr200_tcl.c143 if (rmesa->radeon.dma.flush == r200FlushElts && in r200AllocElts()
154 if (rmesa->radeon.dma.flush) in r200AllocElts()
155 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); in r200AllocElts()
547 if ( rmesa->radeon.dma.flush ) in transition_to_hwtnl()
548 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); in transition_to_hwtnl()
550 rmesa->radeon.dma.flush = NULL; in transition_to_hwtnl()
614 if ( rmesa->radeon.dma.flush ) in r200TclFallback()
615 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); in r200TclFallback()
627 if ( rmesa->radeon.dma.flush ) in r200TclFallback()
628 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); in r200TclFallback()
Dradeon_queryobj.c112 if (radeon->dma.flush) in radeonBeginQuery()
113 radeon->dma.flush(&radeon->glCtx); in radeonBeginQuery()
152 if (radeon->dma.flush) in radeonEndQuery()
153 radeon->dma.flush(&radeon->glCtx); in radeonEndQuery()
Dr200_ioctl.h75 if ( rmesa->radeon.dma.flush ) \
76 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \
Dr200_cmdbuf.c167 assert( rmesa->radeon.dma.flush == r200FlushElts ); in r200FlushElts()
168 rmesa->radeon.dma.flush = NULL; in r200FlushElts()
203 assert(!rmesa->radeon.dma.flush); in r200AllocEltsOpenEnded()
205 rmesa->radeon.dma.flush = r200FlushElts; in r200AllocEltsOpenEnded()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_resource_buffer_upload.c121 assert(sbuf->handle || !sbuf->dma.pending); in svga_buffer_create_hw_storage()
134 assert(!sbuf->dma.pending); in svga_buffer_create_hw_storage()
201 sbuf->dma.flags.discard = TRUE; in svga_buffer_create_host_surface()
242 assert(sbuf->dma.updates == NULL); in svga_buffer_upload_gb_command()
244 if (sbuf->dma.flags.discard) { in svga_buffer_upload_gb_command()
305 sbuf->dma.updates = whole_update_cmd; in svga_buffer_upload_gb_command()
313 memcpy(whole_update_cmd, sbuf->dma.updates, sizeof(*whole_update_cmd)); in svga_buffer_upload_gb_command()
321 sbuf->dma.svga = svga; in svga_buffer_upload_gb_command()
327 sbuf->dma.flags.discard = FALSE; in svga_buffer_upload_gb_command()
389 sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1]; in svga_buffer_upload_hb_command()
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Dsvga_resource_buffer.c120 if (sbuf->dma.pending > 0) { in svga_buffer_transfer_map()
151 if (sbuf->dma.pending) { in svga_buffer_transfer_map()
167 sbuf->dma.flags.discard = TRUE; in svga_buffer_transfer_map()
177 sbuf->dma.flags.unsynchronized = TRUE; in svga_buffer_transfer_map()
187 if (sbuf->dma.pending) { in svga_buffer_transfer_map()
222 sbuf->dma.flags.unsynchronized = FALSE; in svga_buffer_transfer_map()
336 sbuf->dma.flags.discard = TRUE; in svga_buffer_transfer_unmap()
357 assert(!sbuf->dma.pending); in svga_buffer_destroy()
/external/syslinux/gpxe/src/drivers/net/
Dmyri10ge.c143 struct myri10ge_dma_buffers *dma; member
251 response = &priv->dma->command_response; in myri10ge_command()
265 = htonl ( virt_to_bus ( &priv->dma->command_response ) ); in myri10ge_command()
305 irq_data = &priv->dma->irq_data; in myri10ge_interrupt_handler()
339 nic_done_count = ntohl ( priv->dma->irq_data.send_done_count ); in myri10ge_interrupt_handler()
626 free_dma ( priv->dma, sizeof ( *priv->dma ) ); in myri10ge_net_close()
696 priv->dma = malloc_dma ( sizeof ( *priv->dma ) , 128 ); in myri10ge_net_open()
697 if ( !priv->dma ) { in myri10ge_net_open()
702 memset ( priv->dma, 0, sizeof ( *priv->dma ) ); in myri10ge_net_open()
726 data[0] = ( sizeof ( priv->dma->receive_completion ) in myri10ge_net_open()
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Dmtnic.c195 &ring->dma, PAGE_SIZE); in mtnic_alloc_ring()
206 ring->buf_size, ring->dma); in mtnic_alloc_ring()
296 (void *)&cq->buf, &cq->dma, PAGE_SIZE); in mtnic_alloc_cq()
306 cq->buf_size, cq->dma, cq->db, in mtnic_alloc_cq()
412 &mtnic->eq.dma, PAGE_SIZE); in mtnic_alloc_eq()
734 config_cq->offset = ((cq->dma) & (PAGE_MASK)) >> 6; in mtnic_CONFIG_CQ()
736 config_cq->page_address[1] = cpu_to_be32(cq->dma); in mtnic_CONFIG_CQ()
739 , config_cq->page_address[1],cq->dma, in mtnic_CONFIG_CQ()
756 config_tx_ring->page_address[1] = cpu_to_be32(ring->dma); in mtnic_CONFIG_TX_RING()
776 DBG("Config RX ring starting at address:%lx\n", ring->dma); in mtnic_CONFIG_RX_RING()
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/external/libdrm/tests/
Ddrmstat.c164 drmDMAReq dma; in main() local
169 dma.context = context; in main()
170 dma.send_count = 0; in main()
171 dma.request_count = count; in main()
172 dma.request_size = size; in main()
173 dma.request_list = indices; in main()
174 dma.request_sizes = sizes; in main()
175 dma.flags = DRM_DMA_WAIT; in main()
176 if ((r = drmDMA(fd, &dma))) { in main()
180 for (i = 0; i < dma.granted_count; i++) { in main()
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/external/clang/test/SemaCXX/
Dwarn-reinterpret-base-class.cpp171 DAi *dai, DVA *dva, DDVA *ddva, DMA *dma) { in reinterpret_pointer_upcast() argument
201 (void)*reinterpret_cast<A *>(dma); in reinterpret_pointer_upcast()
206 (void)*reinterpret_cast<DA *>(dma); in reinterpret_pointer_upcast()
211 DAi &dai, DVA &dva, DDVA &ddva, DMA &dma) { in reinterpret_reference_upcast() argument
241 (void)reinterpret_cast<A &>(dma); in reinterpret_reference_upcast()
246 (void)reinterpret_cast<DA &>(dma); in reinterpret_reference_upcast()
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_pipe_common.c229 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_dma_emit_wait_idle()
245 uint64_t vram = ctx->dma.cs->used_vram; in r600_need_dma_space()
246 uint64_t gtt = ctx->dma.cs->used_gart; in r600_need_dma_space()
280 if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) || in r600_need_dma_space()
281 ctx->dma.cs->used_vram + ctx->dma.cs->used_gart > 64 * 1024 * 1024 || in r600_need_dma_space()
282 !radeon_cs_memory_below_limit(ctx->screen, ctx->dma.cs, vram, gtt)) { in r600_need_dma_space()
283 ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); in r600_need_dma_space()
284 assert((num_dw + ctx->dma.cs->current.cdw) <= ctx->dma.cs->current.max_dw); in r600_need_dma_space()
291 ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, dst->buf, in r600_need_dma_space()
294 ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, src->buf, in r600_need_dma_space()
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Dr600_buffer_common.c40 if (radeon_emitted(ctx->dma.cs, 0) && in r600_rings_is_buffer_referenced()
41 ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, buf, usage)) { in r600_rings_is_buffer_referenced()
74 if (radeon_emitted(ctx->dma.cs, 0) && in r600_buffer_map_sync_with_rings()
75 ctx->ws->cs_is_buffer_referenced(ctx->dma.cs, in r600_buffer_map_sync_with_rings()
78 ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); in r600_buffer_map_sync_with_rings()
81 ctx->dma.flush(ctx, 0, NULL); in r600_buffer_map_sync_with_rings()
93 if (ctx->dma.cs) in r600_buffer_map_sync_with_rings()
94 ctx->ws->cs_sync_flush(ctx->dma.cs); in r600_buffer_map_sync_with_rings()
306 (dword_aligned && (rctx->dma.cs || in r600_can_dma_copy_buffer()
/external/mesa3d/src/gallium/drivers/r600/
Devergreen_hw_context.c38 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in evergreen_dma_copy_buffer()
67 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rsrc, RADEON_USAGE_READ, in evergreen_dma_copy_buffer()
69 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rdst, RADEON_USAGE_WRITE, in evergreen_dma_copy_buffer()
Dr600_hw_context.c37 if (radeon_emitted(ctx->b.dma.cs, 0)) in r600_need_cs_space()
38 ctx->b.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL); in r600_need_cs_space()
527 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in r600_dma_copy_buffer()
545 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rsrc, RADEON_USAGE_READ, in r600_dma_copy_buffer()
547 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rdst, RADEON_USAGE_WRITE, in r600_dma_copy_buffer()
/external/perfetto/src/ftrace_reader/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/xhci-hcd/xhci_cmd_completion/
Dformat10 field:u64 dma; offset:16; size:8; signed:0;
16 trb_dma=@%llx, trb_va=@%pK, status=%08x, flags=%08x", (unsigned long long) REC->dma, REC->va, REC->…
/external/kernel-headers/original/uapi/rdma/
Drdma_user_rxe.h135 struct rxe_dma_info dma; member
142 struct rxe_dma_info dma; member
/external/ltp/testcases/kernel/device-drivers/usb/tusb/
Dst_tusb.h42 dma_addr_t *dma);
44 void *addr, dma_addr_t dma);
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_winsys.c120 struct drm_amdgpu_info_hw_ip dma = {}; in do_winsys_init() local
169 r = amdgpu_query_hw_ip_info(ws->dev, AMDGPU_HW_IP_DMA, 0, &dma); in do_winsys_init()
284 assert(util_is_power_of_two(dma.available_rings + 1)); in do_winsys_init()
304 ws->info.sdma_rings = MIN2(util_bitcount(dma.available_rings), in do_winsys_init()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dcik_sdma.c38 struct radeon_winsys_cs *cs = ctx->b.dma.cs; in cik_sdma_copy_buffer()
79 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_clear_buffer()
228 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_copy_texture()
390 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_copy_texture()
485 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in cik_sdma_copy_texture()
529 if (!sctx->b.dma.cs) in cik_sdma_copy()
Dsi_dma.c39 struct radeon_winsys_cs *cs = ctx->b.dma.cs; in si_dma_copy_buffer()
88 struct radeon_winsys_cs *cs = sctx->b.dma.cs; in si_dma_clear_buffer()
135 struct radeon_winsys_cs *cs = ctx->b.dma.cs; in si_dma_copy_tile()
236 if (sctx->b.dma.cs == NULL) { in si_dma_copy()

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