/external/iptables/extensions/ |
D | libxt_HMARK.c | 86 .flags = XTOPT_PUT, XTOPT_POINTER(hi, dst_mask) 154 memset(&info->dst_mask, 0xff, sizeof(info->dst_mask)); in hmark_parse() 328 xtables_ip6mask_to_numeric(&info->dst_mask.in6) + 1); in HMARK_ip6_print() 349 xtables_ipmask_to_cidr(&info->dst_mask.in)); in HMARK_ip4_print() 395 ret = xtables_ip6mask_to_cidr(&info->dst_mask.in6); in HMARK_ip6_save() 412 ret = xtables_ipmask_to_cidr(&info->dst_mask.in); in HMARK_ip4_save()
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D | libxt_devgroup.c | 88 info->dst_mask = mask; in devgroup_parse() 127 print_devgroup(info->dst_group, info->dst_mask, numeric); in devgroup_show() 195 info->dst_mask, xl, numeric); in devgroup_show_xlate()
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/external/libunwind/src/ia64/ |
D | Grbs.c | 203 unw_word_t n, src_mask, dst_mask, bsp, *dst, src_rnat, dst_rnat = 0; in rbs_cover_and_flush() local 290 dst_mask = ((unw_word_t) 1) << rse_slot_num ((unw_word_t) dst); in rbs_cover_and_flush() 293 dst_rnat |= dst_mask; in rbs_cover_and_flush() 295 dst_rnat &= ~dst_mask; in rbs_cover_and_flush()
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/external/mesa3d/src/mesa/program/ |
D | prog_optimize.c | 55 GLuint arg, GLuint dst_mask) in get_src_arg_mask() argument 79 channel_mask = inst->DstReg.WriteMask & dst_mask; in get_src_arg_mask() 487 GLuint dst_mask, src_mask; in _mesa_remove_extra_move_use() local 494 dst_mask = mov->DstReg.WriteMask; in _mesa_remove_extra_move_use() 522 (read_mask & dst_mask) == read_mask) { in _mesa_remove_extra_move_use() 543 dst_mask &= ~inst2->DstReg.WriteMask; in _mesa_remove_extra_move_use() 544 src_mask = get_src_arg_mask(mov, 0, dst_mask); in _mesa_remove_extra_move_use() 552 dst_mask &= get_dst_mask_for_mov(mov, src_mask); in _mesa_remove_extra_move_use() 554 if (dst_mask == 0) in _mesa_remove_extra_move_use() 765 const GLuint dst_mask = prevInst->DstReg.WriteMask; in _mesa_remove_extra_moves() local [all …]
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/external/mesa3d/src/gallium/auxiliary/util/ |
D | u_surface.c | 561 uint32_t dst_mask; in util_clear_depth_stencil() local 563 dst_mask = 0x00ffffff; in util_clear_depth_stencil() 566 dst_mask = 0xffffff00; in util_clear_depth_stencil() 569 dst_mask = ~dst_mask; in util_clear_depth_stencil() 573 uint32_t tmp = *row & dst_mask; in util_clear_depth_stencil() 574 *row++ = tmp | ((uint32_t) zstencil & ~dst_mask); in util_clear_depth_stencil()
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/external/tcpdump/ |
D | print-cnfp.c | 118 uint8_t dst_mask; /* destination address prefix mask bits */ member 152 uint8_t dst_mask; /* destination address prefix mask bits */ member 302 snprintf(buf, sizeof(buf), "/%d", nr->dst_mask); in cnfp_v5_print() 398 snprintf(buf, sizeof(buf), "/%d", nr->dst_mask); in cnfp_v6_print()
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/external/kernel-headers/original/uapi/linux/netfilter/ |
D | xt_devgroup.h | 19 __u32 dst_mask; member
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D | xt_HMARK.h | 42 union nf_inet_addr dst_mask; member
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/external/iptables/include/linux/netfilter/ |
D | xt_devgroup.h | 18 __u32 dst_mask; member
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D | xt_HMARK.h | 40 union nf_inet_addr dst_mask; member
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_compiler_util.h | 83 unsigned int dst_mask);
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D | radeon_dataflow.c | 685 unsigned int dst_mask) in get_readers_for_single_write() argument 700 d->DstMask = dst_mask; in get_readers_for_single_write() 701 d->AliveWriteMask = dst_mask; in get_readers_for_single_write() 704 if (!dst_mask) in get_readers_for_single_write()
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D | radeon_compiler_util.c | 318 unsigned int dst_mask) in rc_src_reads_dst_mask() argument 323 return dst_mask & rc_swizzle_to_writemask(src_swz); in rc_src_reads_dst_mask()
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/external/vulkan-validation-layers/tests/ |
D | vkrenderframework.cpp | 731 VkFlags src_mask, dst_mask; in SetLayout() local 749 dst_mask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_TRANSFER_READ_BIT; in SetLayout() 759 dst_mask = VK_ACCESS_TRANSFER_WRITE_BIT; in SetLayout() 767 dst_mask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_MEMORY_READ_BIT; in SetLayout() 775 dst_mask = VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT; in SetLayout() 779 dst_mask = VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT; in SetLayout() 785 dst_mask = all_cache_inputs; in SetLayout() 791 ImageMemoryBarrier(cmd_buf, aspect, src_mask, dst_mask, image_layout); in SetLayout()
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/external/libyuv/files/source/ |
D | scale_msa.cc | 392 v16i8 dst_mask = {0, 2, 16, 4, 6, 18, 8, 10, 20, 12, 14, 22, 0, 0, 0, 0}; in ScaleRowDown38_2_Box_MSA() local 436 out = (v16u8)__msa_vshf_b(dst_mask, (v16i8)vec1, (v16i8)vec0); in ScaleRowDown38_2_Box_MSA() 462 v16i8 dst_mask = {0, 2, 16, 4, 6, 18, 8, 10, 20, 12, 14, 22, 0, 0, 0, 0}; in ScaleRowDown38_3_Box_MSA() local 516 out = (v16u8)__msa_vshf_b(dst_mask, (v16i8)vec1, (v16i8)vec0); in ScaleRowDown38_3_Box_MSA()
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_format_aos.c | 165 LLVMValueRef dst_mask; in scale_bits_up() local 167 dst_mask = lp_build_const_int_vec(gallivm, src_type, in scale_bits_up() 171 result = lp_build_andnot(&bld, dst_mask, result); in scale_bits_up()
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/external/v8/src/arm/ |
D | macro-assembler-arm.h | 750 int dst_mask = 0xf << dst_reg_offset; in GetCodeMarker() local 752 int dst_reg = (instr & dst_mask) >> dst_reg_offset; in GetCodeMarker() 754 uint32_t non_register_mask = ~(dst_mask | src_mask); in GetCodeMarker()
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/external/v8/src/ppc/ |
D | macro-assembler-ppc.h | 670 int dst_mask = 0xf << dst_reg_offset; in GetCodeMarker() local 672 int dst_reg = (instr & dst_mask) >> dst_reg_offset; in GetCodeMarker() 674 uint32_t non_register_mask = ~(dst_mask | src_mask); in GetCodeMarker()
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/external/v8/src/s390/ |
D | macro-assembler-s390.h | 980 int dst_mask = 0xf << dst_reg_offset; in GetCodeMarker() local 982 int dst_reg = (instr & dst_mask) >> dst_reg_offset; in GetCodeMarker() 984 uint32_t non_register_mask = ~(dst_mask | src_mask); in GetCodeMarker()
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_lowering.c | 112 aliases(const struct tgsi_full_dst_register *dst, unsigned dst_mask, in aliases() argument 123 if (actual_mask & dst_mask) in aliases()
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/external/valgrind/VEX/priv/ |
D | guest_amd64_toIR.c | 19122 UShort dst_mask[2] = { 0x07FF, 0x7FF0 }; in math_MPSADBW_128() local 19127 assign(dst_maskV, mkV128( dst_mask[ (imm8 >> 2) & 1 ] )); in math_MPSADBW_128()
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