| /external/adhd/cras/src/server/ |
| D | linear_resampler.c | 24 unsigned int dst_offset; member
61 lr->dst_offset = 0; in linear_resampler_set_rates()
84 in_frames = (float)(lr->dst_offset + frames) / lr->f; in linear_resampler_out_frames_to_in()
99 if (out_frames > lr->dst_offset) in linear_resampler_in_frames_to_out()
100 return 1 + (unsigned int)(out_frames - lr->dst_offset); in linear_resampler_in_frames_to_out()
130 src_pos = (float)(lr->dst_offset + dst_idx) / lr->f; in linear_resampler_resample()
165 lr->dst_offset += dst_idx; in linear_resampler_resample()
167 (lr->dst_offset > lr->to_times_100)) { in linear_resampler_resample()
169 lr->dst_offset -= lr->to_times_100; in linear_resampler_resample()
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| D | cras_audio_area.c | 26 unsigned int dst_offset, in cras_audio_area_copy() argument
36 ncopy = MIN(src->frames - src_offset, dst->frames - dst_offset); in cras_audio_area_copy()
49 dst_offset * dst->channels[dst_idx].step_bytes; in cras_audio_area_copy()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | evergreen_hw_context.c | 34 uint64_t dst_offset, in evergreen_dma_copy_buffer() argument
46 util_range_add(&rdst->valid_buffer_range, dst_offset, in evergreen_dma_copy_buffer()
47 dst_offset + size); in evergreen_dma_copy_buffer()
49 dst_offset += rdst->gpu_address; in evergreen_dma_copy_buffer()
53 if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) { in evergreen_dma_copy_buffer()
72 radeon_emit(cs, dst_offset & 0xffffffff); in evergreen_dma_copy_buffer()
74 radeon_emit(cs, (dst_offset >> 32UL) & 0xff); in evergreen_dma_copy_buffer()
76 dst_offset += csize << shift; in evergreen_dma_copy_buffer()
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| D | r600_hw_context.c | 441 struct pipe_resource *dst, uint64_t dst_offset, in r600_cp_dma_copy_buffer() argument
453 util_range_add(&r600_resource(dst)->valid_buffer_range, dst_offset, in r600_cp_dma_copy_buffer()
454 dst_offset + size); in r600_cp_dma_copy_buffer()
456 dst_offset += r600_resource(dst)->gpu_address; in r600_cp_dma_copy_buffer()
493 radeon_emit(cs, dst_offset); /* DST_ADDR_LO [31:0] */ in r600_cp_dma_copy_buffer()
494 radeon_emit(cs, (dst_offset >> 32) & 0xff); /* DST_ADDR_HI [7:0] */ in r600_cp_dma_copy_buffer()
504 dst_offset += byte_count; in r600_cp_dma_copy_buffer()
523 uint64_t dst_offset, in r600_dma_copy_buffer() argument
535 util_range_add(&rdst->valid_buffer_range, dst_offset, in r600_dma_copy_buffer()
536 dst_offset + size); in r600_dma_copy_buffer()
[all …]
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| /external/mesa3d/src/gallium/auxiliary/draw/ |
| D | draw_pt_fetch.c | 68 unsigned dst_offset = 0; in draw_pt_fetch_prepare() local
77 dst_offset = offsetof(struct vertex_header, data); in draw_pt_fetch_prepare()
92 key.element[nr].output_offset = dst_offset; in draw_pt_fetch_prepare()
94 dst_offset += sizeof(uint); in draw_pt_fetch_prepare()
102 key.element[nr].output_offset = dst_offset; in draw_pt_fetch_prepare()
105 dst_offset += 4 * sizeof(int); in draw_pt_fetch_prepare()
113 key.element[nr].output_offset = dst_offset; in draw_pt_fetch_prepare()
116 dst_offset += 4 * sizeof(unsigned); in draw_pt_fetch_prepare()
124 key.element[nr].output_offset = dst_offset; in draw_pt_fetch_prepare()
127 dst_offset += 4 * sizeof(float); in draw_pt_fetch_prepare()
[all …]
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| D | draw_pt_emit.c | 60 unsigned dst_offset; in draw_pt_emit_prepare() local
81 dst_offset = 0; in draw_pt_emit_prepare()
110 hw_key.element[i].output_offset = dst_offset; in draw_pt_emit_prepare()
112 dst_offset += emit_sz; in draw_pt_emit_prepare()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_blit.c | 41 unsigned dst_offset, in i915_fill_blit() argument
50 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); in i915_fill_blit()
82 OUT_RELOC_FENCED(dst_buffer, I915_USAGE_2D_TARGET, dst_offset); in i915_fill_blit()
96 unsigned dst_offset, in i915_copy_blit() argument
111 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); in i915_copy_blit()
154 OUT_RELOC_FENCED(dst_buffer, I915_USAGE_2D_TARGET, dst_offset); in i915_copy_blit()
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| D | i915_blit.h | 40 unsigned dst_offset,
50 unsigned dst_offset,
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_dma.c | 35 uint64_t dst_offset, in si_dma_copy_buffer() argument
47 util_range_add(&rdst->valid_buffer_range, dst_offset, in si_dma_copy_buffer()
48 dst_offset + size); in si_dma_copy_buffer()
50 dst_offset += rdst->gpu_address; in si_dma_copy_buffer()
54 if (!(dst_offset % 4) && !(src_offset % 4) && !(size % 4)) { in si_dma_copy_buffer()
71 radeon_emit(cs, dst_offset); in si_dma_copy_buffer()
73 radeon_emit(cs, (dst_offset >> 32UL) & 0xff); in si_dma_copy_buffer()
75 dst_offset += count; in si_dma_copy_buffer()
297 uint64_t dst_offset, src_offset; in si_dma_copy() local
306 dst_offset = rdst->surface.level[dst_level].offset; in si_dma_copy()
[all …]
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| D | si_cp_dma.c | 305 uint64_t dst_offset, uint64_t src_offset, unsigned size, in si_copy_buffer() argument
318 if (dst != src || dst_offset != src_offset) { in si_copy_buffer()
322 util_range_add(&r600_resource(dst)->valid_buffer_range, dst_offset, in si_copy_buffer()
323 dst_offset + size); in si_copy_buffer()
326 dst_offset += r600_resource(dst)->gpu_address; in si_copy_buffer()
357 main_dst_offset = dst_offset + skipped_size; in si_copy_buffer()
384 si_emit_cp_dma(sctx, dst_offset, src_offset, skipped_size, in si_copy_buffer()
397 if (dst_offset != src_offset) in si_copy_buffer()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | intel_blit.c | 265 uint32_t dst_offset, dst_tile_x, dst_tile_y; in emit_miptree_blit() local
268 &dst_offset, &dst_tile_x, &dst_tile_y); in emit_miptree_blit()
277 dst_mt->bo, dst_mt->offset + dst_offset, in emit_miptree_blit()
483 uintptr_t dst_offset, int32_t dst_pitch, in can_fast_copy_blit() argument
510 if ((dst_offset | src_offset) & 63) in can_fast_copy_blit()
581 GLuint dst_offset, in intelEmitCopyBlit() argument
624 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); in intelEmitCopyBlit()
643 dst_offset, dst_pitch, in intelEmitCopyBlit()
695 if (!alignment_valid(brw, dst_offset, dst_tiling)) in intelEmitCopyBlit()
704 dst_pitch % 4 != 0 || dst_offset % cpp != 0) in intelEmitCopyBlit()
[all …]
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| D | intel_blit.h | 41 GLuint dst_offset,
77 GLuint dst_offset,
84 unsigned int dst_offset,
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| /external/libconstrainedcrypto/ |
| D | dsa_sig.c | 37 int dst_offset; in trim_to_p256_bytes() local
45 dst_offset = P256_NBYTES - src_len; in trim_to_p256_bytes()
46 memset(dst, 0, dst_offset); in trim_to_p256_bytes()
47 memcpy(dst + dst_offset, src, src_len); in trim_to_p256_bytes()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_blit.c | 225 GLuint dst_offset, in intelEmitCopyBlit() argument
241 if (dst_offset & 4095) in intelEmitCopyBlit()
271 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); in intelEmitCopyBlit()
277 dst_pitch % 4 != 0 || dst_offset % cpp != 0) in intelEmitCopyBlit()
327 dst_offset); in intelEmitCopyBlit()
522 GLuint dst_offset, in intelEmitImmediateColorExpandBlit() argument
532 if (dst_offset & 4095) in intelEmitImmediateColorExpandBlit()
546 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); in intelEmitImmediateColorExpandBlit()
571 dst_offset); in intelEmitImmediateColorExpandBlit()
595 unsigned int dst_offset, in intel_emit_linear_blit() argument
[all …]
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| D | intel_pixel_read.c | 80 GLuint dst_offset; in do_blit_readpixels() local
114 dst_offset = (GLintptr)pixels; in do_blit_readpixels()
115 dst_offset += _mesa_image_offset(2, pack, width, height, in do_blit_readpixels()
135 dst_offset, in do_blit_readpixels()
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| D | intel_blit.h | 47 GLuint dst_offset,
71 GLuint dst_offset,
78 unsigned int dst_offset,
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| /external/tensorflow/tensorflow/contrib/lite/toco/graph_transformations/ |
| D | resolve_constant_stack.cc | 38 int dst_offset = 0; in Stack() local
43 memcpy(&output_data[dst_offset], &input_array.GetBuffer<Type>().data[0], in Stack()
45 dst_offset += input_size; in Stack()
47 CHECK_EQ(dst_offset, output_data.size()); in Stack()
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| D | resolve_constant_strided_slice.cc | 98 int dst_offset = 0; in StridedSlice() local
101 output_data[dst_offset] = input_buffer.data[Offset(input_shape, src_coord)]; in StridedSlice()
121 dst_offset++; in StridedSlice()
122 } while (dst_offset < output_data.size()); in StridedSlice()
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| /external/valgrind/none/tests/s390x/ |
| D | mvcl.c | 175 uint32_t dst_offset, dst_len, src_offset, src_len; in main() local
264 for (dst_offset = 0; dst_offset < sizeof buf; ++dst_offset) in main()
265 for (dst_len = 0; dst_len <= sizeof buf - dst_offset; ++dst_len) in main()
268 run_test(buf + dst_offset, dst_len, buf + src_offset, src_len, 'x'); in main()
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_pixel_read.c | 101 intptr_t dst_offset; in do_blit_readpixels() local
143 dst_offset = 0; in do_blit_readpixels()
148 dst_offset = (intptr_t)pixels; in do_blit_readpixels()
168 dst_offset, in do_blit_readpixels()
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| D | radeon_tex_copy.c | 85 intptr_t dst_offset = radeon_miptree_image_offset(timg->mt, face, level); in do_copy_texsubimage() local
90 fprintf(stderr, "to: x %d, y %d, offset %d\n", dstx, dsty, (uint32_t) dst_offset); in do_copy_texsubimage()
130 timg->mt->bo, dst_offset, dst_mesaformat, in do_copy_texsubimage()
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | radeon_pixel_read.c | 101 intptr_t dst_offset; in do_blit_readpixels() local
143 dst_offset = 0; in do_blit_readpixels()
148 dst_offset = (intptr_t)pixels; in do_blit_readpixels()
168 dst_offset, in do_blit_readpixels()
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| D | radeon_tex_copy.c | 85 intptr_t dst_offset = radeon_miptree_image_offset(timg->mt, face, level); in do_copy_texsubimage() local
90 fprintf(stderr, "to: x %d, y %d, offset %d\n", dstx, dsty, (uint32_t) dst_offset); in do_copy_texsubimage()
130 timg->mt->bo, dst_offset, dst_mesaformat, in do_copy_texsubimage()
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| /external/mesa3d/src/intel/vulkan/ |
| D | genX_gpu_memcpy.c | 56 struct anv_bo *dst, uint32_t dst_offset, in genX()
63 assert(dst_offset + size <= dst->size); in genX()
69 bs = gcd_pow2_u64(bs, dst_offset); in genX()
161 sob.SurfaceBaseAddress = (struct anv_address) { dst, dst_offset }; in genX()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_meta_resolve_cs.c | 79 …nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_con… in build_resolve_compute_shader() local
80 dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); in build_resolve_compute_shader()
81 dst_offset->num_components = 2; in build_resolve_compute_shader()
82 nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset"); in build_resolve_compute_shader()
83 nir_builder_instr_insert(&b, &dst_offset->instr); in build_resolve_compute_shader()
161 nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa); in build_resolve_compute_shader()
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