/external/mesa3d/src/gallium/drivers/ilo/core/ |
D | ilo_state_cc.c | 90 uint32_t dw0, dw1, dw2; in cc_set_gen6_DEPTH_STENCIL_STATE() local 98 dw0 = 0; in cc_set_gen6_DEPTH_STENCIL_STATE() 107 dw0 |= GEN6_ZS_DW0_STENCIL_TEST_ENABLE; in cc_set_gen6_DEPTH_STENCIL_STATE() 110 dw0 |= GEN6_ZS_DW0_STENCIL1_ENABLE; in cc_set_gen6_DEPTH_STENCIL_STATE() 119 dw0 |= front->test_func << GEN6_ZS_DW0_STENCIL_FUNC__SHIFT | in cc_set_gen6_DEPTH_STENCIL_STATE() 138 dw0 |= GEN6_ZS_DW0_STENCIL_WRITE_ENABLE; in cc_set_gen6_DEPTH_STENCIL_STATE() 159 cc->ds[0] = dw0; in cc_set_gen6_DEPTH_STENCIL_STATE() 490 uint32_t dw0, dw1; in cc_set_gen6_BLEND_STATE() local 550 dw0 = rt.a_func << GEN6_RT_DW0_ALPHA_FUNC__SHIFT | in cc_set_gen6_BLEND_STATE() 558 dw0 |= GEN6_RT_DW0_BLEND_ENABLE; in cc_set_gen6_BLEND_STATE() [all …]
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D | ilo_state_surface.c | 37 uint32_t dw0, dw3; in surface_set_gen6_null_SURFACE_STATE() local 59 dw0 = GEN6_SURFTYPE_NULL << GEN6_SURFACE_DW0_TYPE__SHIFT | in surface_set_gen6_null_SURFACE_STATE() 64 surf->surface[0] = dw0; in surface_set_gen6_null_SURFACE_STATE() 78 uint32_t dw0; in surface_set_gen7_null_SURFACE_STATE() local 82 dw0 = GEN6_SURFTYPE_NULL << GEN7_SURFACE_DW0_TYPE__SHIFT | in surface_set_gen7_null_SURFACE_STATE() 85 dw0 |= GEN6_TILING_X << GEN8_SURFACE_DW0_TILING__SHIFT; in surface_set_gen7_null_SURFACE_STATE() 87 dw0 |= GEN6_TILING_X << GEN7_SURFACE_DW0_TILING__SHIFT; in surface_set_gen7_null_SURFACE_STATE() 90 surf->surface[0] = dw0; in surface_set_gen7_null_SURFACE_STATE() 322 uint32_t dw0, dw1, dw2, dw3; in surface_set_gen6_buffer_SURFACE_STATE() local 339 dw0 = GEN6_SURFTYPE_BUFFER << GEN6_SURFACE_DW0_TYPE__SHIFT | in surface_set_gen6_buffer_SURFACE_STATE() [all …]
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D | ilo_state_vf.c | 136 uint32_t dw0, dw1; in vf_set_gen6_3DSTATE_VERTEX_ELEMENTS() local 164 dw0 = elem->buffer << GEN6_VE_DW0_VB_INDEX__SHIFT | in vf_set_gen6_3DSTATE_VERTEX_ELEMENTS() 173 vf->user_ve[i][0] = dw0; in vf_set_gen6_3DSTATE_VERTEX_ELEMENTS() 185 vf->last_user_ve[0][0] = dw0; in vf_set_gen6_3DSTATE_VERTEX_ELEMENTS() 198 dw0 = elem->buffer << GEN6_VE_DW0_VB_INDEX__SHIFT | in vf_set_gen6_3DSTATE_VERTEX_ELEMENTS() 207 vf->last_user_ve[1][0] = dw0; in vf_set_gen6_3DSTATE_VERTEX_ELEMENTS() 436 uint32_t dw0 = 0; in vf_params_set_gen6_3dstate_index_buffer() local 446 dw0 |= GEN6_IB_DW0_CUT_INDEX_ENABLE; in vf_params_set_gen6_3dstate_index_buffer() 450 vf->cut[0] = dw0; in vf_params_set_gen6_3dstate_index_buffer() 460 uint32_t dw0 = 0; in vf_params_set_gen75_3DSTATE_VF() local [all …]
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D | ilo_state_sampler.c | 330 uint32_t dw0, dw1, dw3; in sampler_set_gen6_SAMPLER_STATE() local 381 dw0 = GEN6_SAMPLER_DW0_LOD_PRECLAMP_ENABLE | in sampler_set_gen6_SAMPLER_STATE() 388 dw0 |= GEN7_SAMPLER_DW0_BORDER_COLOR_MODE_DX10_OGL | in sampler_set_gen6_SAMPLER_STATE() 393 dw0 |= GEN7_SAMPLER_DW0_ANISO_ALGO_EWA; in sampler_set_gen6_SAMPLER_STATE() 395 dw0 |= lod_bias << GEN6_SAMPLER_DW0_LOD_BIAS__SHIFT | in sampler_set_gen6_SAMPLER_STATE() 416 dw0 |= GEN6_SAMPLER_DW0_MIN_MAG_NOT_EQUAL; in sampler_set_gen6_SAMPLER_STATE() 469 sampler->sampler[0] = dw0; in sampler_set_gen6_SAMPLER_STATE()
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D | ilo_state_compute.c | 376 uint32_t dw0, dw2, dw3, dw4, dw5, dw6; in compute_set_gen6_INTERFACE_DESCRIPTOR_DATA() local 391 dw0 = interface->kernel_offset; in compute_set_gen6_INTERFACE_DESCRIPTOR_DATA() 445 compute->idrt[i][0] = dw0; in compute_set_gen6_INTERFACE_DESCRIPTOR_DATA()
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D | ilo_state_viewport.c | 218 uint32_t dw0, dw1; in viewport_scissor_set_gen6_SCISSOR_RECT() local 225 dw0 = min_y << GEN6_SCISSOR_DW0_MIN_Y__SHIFT | in viewport_scissor_set_gen6_SCISSOR_RECT() 231 vp->scissor[i][0] = dw0; in viewport_scissor_set_gen6_SCISSOR_RECT()
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D | ilo_builder_render.h | 58 const uint32_t dw0 = GEN6_RENDER_CMD(SINGLE_DW, PIPELINE_SELECT) | in gen6_PIPELINE_SELECT() local 75 ilo_builder_batch_write(builder, cmd_len, &dw0); in gen6_PIPELINE_SELECT()
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D | ilo_builder_3d_top.h | 213 const uint32_t dw0 = GEN6_RENDER_CMD(SINGLE_DW, 3DSTATE_VF_STATISTICS) | in gen6_3DSTATE_VF_STATISTICS() local 218 ilo_builder_batch_write(builder, cmd_len, &dw0); in gen6_3DSTATE_VF_STATISTICS() 418 uint32_t dw0, *dw; in gen6_3DSTATE_INDEX_BUFFER() local 423 dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2) | in gen6_3DSTATE_INDEX_BUFFER() 430 dw0 |= ib->ib[0]; in gen6_3DSTATE_INDEX_BUFFER() 432 dw0 |= vf->cut[0]; in gen6_3DSTATE_INDEX_BUFFER() 436 dw[0] = dw0; in gen6_3DSTATE_INDEX_BUFFER()
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/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_decoder.cpp | 33 uint32_t dw0 = dw[i]; in decode_cf() local 54 CF_WORD0_EGCM w0(dw0); in decode_cf() 83 CF_WORD0_R6R7 w0(dw0); in decode_cf() 111 uint32_t dw0 = dw[i++]; in decode_cf_alu() local 116 CF_ALU_WORD0_ALL w0(dw0); in decode_cf_alu() 144 CF_ALU_WORD0_EXT_EGCM w0(dw0); in decode_cf_alu() 177 uint32_t dw0 = dw[i++]; in decode_cf_exp() local 181 CF_ALLOC_EXPORT_WORD0_ALL w0(dw0); in decode_cf_exp() 231 uint32_t dw0 = dw[i++]; in decode_cf_mem() local 236 CF_ALLOC_EXPORT_WORD0_ALL w0(dw0); in decode_cf_mem() [all …]
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_draw_upload.c | 803 uint32_t dw0; in brw_emit_vertex_buffer_state() local 806 dw0 = buffer_nr << GEN6_VB0_INDEX_SHIFT; in brw_emit_vertex_buffer_state() 808 dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) | in brw_emit_vertex_buffer_state() 812 dw0 = (buffer_nr << BRW_VB0_INDEX_SHIFT) | in brw_emit_vertex_buffer_state() 818 dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; in brw_emit_vertex_buffer_state() 822 dw0 |= GEN7_MOCS_L3 << 16; in brw_emit_vertex_buffer_state() 825 dw0 |= BDW_MOCS_WB << 16; in brw_emit_vertex_buffer_state() 828 dw0 |= SKL_MOCS_WB << 16; in brw_emit_vertex_buffer_state() 835 OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT)); in brw_emit_vertex_buffer_state() 1068 uint32_t dw0 = 0, dw1 = 0; in brw_emit_vertices() local [all …]
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D | brw_disasm.c | 1224 uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) in brw_disassemble_imm() argument 1227 inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0); in brw_disassemble_imm()
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/external/mesa3d/src/gallium/drivers/ilo/shader/ |
D | toy_compiler_disasm.c | 203 disasm_inst_decode_dw0_opcode_gen6(struct disasm_inst *inst, uint32_t dw0) in disasm_inst_decode_dw0_opcode_gen6() argument 207 inst->opcode = GEN_EXTRACT(dw0, GEN6_INST_OPCODE); in disasm_inst_decode_dw0_opcode_gen6() 240 disasm_inst_decode_dw0_gen6(struct disasm_inst *inst, uint32_t dw0) in disasm_inst_decode_dw0_gen6() argument 244 disasm_inst_decode_dw0_opcode_gen6(inst, dw0); in disasm_inst_decode_dw0_gen6() 246 inst->access_mode = GEN_EXTRACT(dw0, GEN6_INST_ACCESSMODE); in disasm_inst_decode_dw0_gen6() 249 inst->dep_ctrl = GEN_EXTRACT(dw0, GEN8_INST_DEPCTRL); in disasm_inst_decode_dw0_gen6() 250 inst->nib_ctrl = (bool) (dw0 & GEN8_INST_NIBCTRL); in disasm_inst_decode_dw0_gen6() 252 inst->mask_ctrl = GEN_EXTRACT(dw0, GEN6_INST_MASKCTRL); in disasm_inst_decode_dw0_gen6() 253 inst->dep_ctrl = GEN_EXTRACT(dw0, GEN6_INST_DEPCTRL); in disasm_inst_decode_dw0_gen6() 256 inst->qtr_ctrl = GEN_EXTRACT(dw0, GEN6_INST_QTRCTRL); in disasm_inst_decode_dw0_gen6() [all …]
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D | toy_compiler_asm.c | 812 uint32_t dw0, dw1, dw_src[3]; in codegen_inst_3src_gen6() local 818 dw0 = translate_inst_gen8(cg); in codegen_inst_3src_gen6() 820 dw0 = translate_inst_gen6(cg); in codegen_inst_3src_gen6() 891 code[0] = dw0; in codegen_inst_3src_gen6()
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/external/mesa3d/src/mesa/drivers/dri/i915/ |
D | i915_state.c | 209 GLuint dw0, dw1; in i915EvalLogicOpBlendState() local 211 dw0 = i915->state.Ctx[I915_CTXREG_LIS5]; in i915EvalLogicOpBlendState() 215 dw0 |= S5_LOGICOP_ENABLE; in i915EvalLogicOpBlendState() 219 dw0 &= ~S5_LOGICOP_ENABLE; in i915EvalLogicOpBlendState() 228 if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] || in i915EvalLogicOpBlendState() 230 i915->state.Ctx[I915_CTXREG_LIS5] = dw0; in i915EvalLogicOpBlendState()
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