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/external/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-flt.ll41 ; M3: mov.s $f13, $f14
45 ; M3: mov.s $f0, $f13
58 ; CMOV-64: movn.s $f14, $f13, $[[T0]]
62 ; SEL-64: sel.s $f0, $f14, $f13
82 ; M3: mov.s $f12, $f13
95 ; CMOV-64: movn.s $f13, $f12, $[[T0]]
96 ; CMOV-64: mov.s $f0, $f13
99 ; SEL-64: sel.s $f0, $f13, $f12
114 ; M3: c.olt.s $f12, $f13
118 ; M3: mov.s $f12, $f13
[all …]
Dselect-dbl.ll63 ; M3: mov.d $f13, $f14
66 ; M3: mov.d $f0, $f13
69 ; CMOV-64: movn.d $f14, $f13, $[[T0]]
73 ; SEL-64: sel.d $f0, $f14, $f13
111 ; M3: mov.d $f12, $f13
117 ; CMOV-64: movn.d $f13, $f12, $[[T0]]
118 ; CMOV-64: mov.d $f0, $f13
121 ; SEL-64: sel.d $f0, $f13, $f12
137 ; M3: c.olt.d $f12, $f13
141 ; M3: mov.d $f12, $f13
[all …]
/external/llvm/test/CodeGen/Mips/
Dfcmp.ll47 ; 64-C-DAG: c.eq.s $f12, $f13
54 ; 64-CMP-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f13
64 ; MM64R6-DAG: cmp.eq.s $[[T0:f[0-9]+]], $f12, $f13
81 ; 64-C-DAG: c.ule.s $f12, $f13
88 ; 64-CMP-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f13, $f12
98 ; MM64R6-DAG: cmp.lt.s $[[T0:f[0-9]+]], $f13, $f12
115 ; 64-C-DAG: c.ult.s $f12, $f13
122 ; 64-CMP-DAG: cmp.le.s $[[T0:f[0-9]+]], $f13, $f12
132 ; MM64R6-DAG: cmp.le.s $[[T0:f[0-9]+]], $f13, $f12
149 ; 64-C-DAG: c.olt.s $f12, $f13
[all …]
Dno-odd-spreg-msa.ll14 %b = call float asm sideeffect "mov.s $0, $1", "={$f13},{$f12}" (float %a)
17 ; Clobber all except $f12/$w12 and $f13
20 ; allocator will choose $f12/$w12 for the vector and $f13 for the float to
24 ; must copy $f13 to an even-numbered register before inserting into the
33 ; ALL: mov.s $f13, $f12
36 ; NOODDSPREG: mov.s $f[[F0:[0-9]+]], $f13
48 %b = call float asm sideeffect "mov.s $0, $1", "={$f13},{$f12}" (float %a)
51 ; Clobber all except $f12/$w12 and $f13
54 ; allocator will choose $f12/$w12 for the vector and $f13 for the float to
58 ; must copy $f13 to an even-numbered register before inserting into the
[all …]
Dfmadd1.ll42 ; 64-DAG: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
46 ; 64R2: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
50 ; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
82 ; 64-DAG: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13
86 ; 64R2: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13
90 ; 64R6-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13
125 ; 64-NONAN: nmadd.s $f0, $f14, $f12, $f13
127 ; 64-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
131 ; 64R2-NONAN: nmadd.s $f0, $f14, $f12, $f13
133 ; 64R2-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13
[all …]
Dselect.ll149 ; 64: movn.s $f14, $f13, $4
152 ; 64R2: movn.s $f14, $f13, $4
157 ; 64R6: sel.s $[[CC]], $f14, $f13
185 ; 64: movn.d $f14, $f13, $4
188 ; 64R2: movn.d $f14, $f13, $4
193 ; 64R6: sel.d $[[CC]], $f14, $f13
222 ; 64: movt.s $f13, $f12, $fcc0
223 ; 64: mov.s $f0, $f13
226 ; 64R2: movt.s $f13, $f12, $fcc0
227 ; 64R2: mov.s $f0, $f13
[all …]
Dfpbr.ll13 ; 64-FCC: c.eq.s $f12, $f13
17 ; 64-GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $f13
48 ; 64-FCC: c.olt.s $f12, $f13
52 ; 64-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f13, $f12
78 ; 64-FCC: c.ole.s $f12, $f13
82 ; 64-GPR: cmp.ult.s $[[FGRCC:f[0-9]+]], $f13, $f12
108 ; 64-FCC: c.eq.d $f12, $f13
112 ; 64-GPR: cmp.eq.d $[[FGRCC:f[0-9]+]], $f12, $f13
139 ; 64-FCC: c.olt.d $f12, $f13
143 ; 64-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f13, $f12
[all …]
Dno-odd-spreg.ll15 ; Clobber all except $f12 and $f13
18 ; allocator will choose $f12 and $f13 to avoid the spill/reload.
30 ; ODDSPREG: add.s $f13, $f12, ${{f[0-9]+}}
33 ; ODDSPREG: add.s $f0, $f12, $f13
42 ; Clobber all except $f12 and $f13
45 ; use $f12 and $f13.
Dfpxx.ll68 ; 4-NOFPXX: mov.d $f0, $f13
70 ; 64-NOFPXX: mov.d $f0, $f13
116 ; 4-NOFPXX: mov.d $f0, $f13
118 ; 64-NOFPXX: mov.d $f0, $f13
179 ; 4-NOFPXX: sub.d $f0, $f12, $f13
182 ; 64-NOFPXX: sub.d $f0, $f12, $f13
213 ; 4-NOFPXX: mov.d $f13, $f0
220 ; 64-NOFPXX: mov.d $f13, $f0
/external/webrtc/webrtc/modules/audio_processing/aec/
Daec_rdft_mips.c272 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cft1st_128_mips() local
512 [f12] "=&f" (f12), [f13] "=&f" (f13), [f14] "=&f" (f14), in cft1st_128_mips()
521 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cftmdl_128_mips() local
631 f13 = rdft_wk3ri_first[2]; in cftmdl_128_mips()
714 [f12] "f" (f12), [f13] "f" (f13), [f14] "f" (f14) in cftmdl_128_mips()
719 f13 = rdft_wk3ri_second[2]; in cftmdl_128_mips()
801 [f12] "f" (f12), [f13] "f" (f13), [f14] "f" (f14) in cftmdl_128_mips()
929 float f1, f2, f3 ,f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14, f15; in rftfsub_128_mips() local
1042 [f13] "=&f" (f13), [f14] "=&f" (f14), [f15] "=&f" (f15), in rftfsub_128_mips()
1056 float f1, f2, f3 ,f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14, f15; in rftbsub_128_mips() local
[all …]
/external/llvm/test/MC/SystemZ/
Dregs-good.s63 #CHECK: ler %f12, %f13 # encoding: [0x38,0xcd]
72 ler %f12,%f13
81 #CHECK: ldr %f12, %f13 # encoding: [0x28,0xcd]
90 ldr %f12,%f13
96 #CHECK: lxr %f12, %f13 # encoding: [0xb3,0x65,0x00,0xcd]
101 lxr %f12,%f13
132 #CHECK: .cfi_offset %f13, 232
166 .cfi_offset %f13,232
/external/capstone/suite/MC/SystemZ/
Dinsn-good.s.cs214 0xb3,0x4a,0x00,0x0d = axbr %f0, %f13
216 0xb3,0x4a,0x00,0xd0 = axbr %f13, %f0
331 0xb3,0x9a,0x00,0x0d = cfxbr %r0, 0, %f13
407 0xb3,0xaa,0x00,0x0d = cgxbr %r0, 0, %f13
599 0xb3,0x49,0x00,0x0d = cxbr %f0, %f13
601 0xb3,0x49,0x00,0xd0 = cxbr %f13, %f0
604 0xb3,0x96,0x00,0xd0 = cxfbr %f13, %r0
606 0xb3,0x96,0x00,0xdf = cxfbr %f13, %r15
609 0xb3,0xa6,0x00,0xd0 = cxgbr %f13, %r0
611 0xb3,0xa6,0x00,0xdf = cxgbr %f13, %r15
[all …]
Dregs-good.s.cs32 0x38,0xcd = ler %f12, %f13
40 0x28,0xcd = ldr %f12, %f13
45 0xb3,0x65,0x00,0xcd = lxr %f12, %f13
/external/python/cpython3/Modules/_ctypes/libffi/testsuite/libffi.call/
Dmany.c14 …t f4, float f5, float f6, float f7, float f8, float f9, float f10, float f11, float f12, float f13) in many() argument
20 (double) f11, (double) f12, (double) f13); in many()
23 return f1+f2+f3+f4+f5+f6+f7+f8+f9+f10+f11+f12+f13; in many()
/external/libffi/testsuite/libffi.call/
Dmany.c14 …t f4, float f5, float f6, float f7, float f8, float f9, float f10, float f11, float f12, float f13) in many() argument
20 (double) f11, (double) f12, (double) f13); in many()
23 return f1+f2+f3+f4+f5+f6+f7+f8+f9+f10+f11+f12+f13; in many()
Dmany_double.c26 double f13) in many() argument
32 (double) f11, (double) f12, (double) f13); in many()
35 return ((f1/f2+f3/f4+f5/f6+f7/f8+f9/f10+f11/f12) * f13); in many()
/external/python/cpython2/Modules/_ctypes/libffi/testsuite/libffi.call/
Dmany.c14 …t f4, float f5, float f6, float f7, float f8, float f9, float f10, float f11, float f12, float f13) in many() argument
20 (double) f11, (double) f12, (double) f13); in many()
23 return f1+f2+f3+f4+f5+f6+f7+f8+f9+f10+f11+f12+f13; in many()
/external/llvm/test/CodeGen/SystemZ/
Dframe-07.ll20 ; CHECK-NOFP: std %f13, 4080(%r15)
28 ; CHECK-NOFP: .cfi_offset %f13, -208
37 ; CHECK-NOFP: ld %f13, 4080(%r15)
54 ; CHECK-FP: std %f13, 4080(%r11)
63 ; CHECK-FP: ld %f13, 4080(%r11)
141 ; CHECK-NOFP: stdy %f13, 524272(%r15)
149 ; CHECK-NOFP: .cfi_offset %f13, -208
158 ; CHECK-NOFP: ldy %f13, 524272(%r15)
174 ; CHECK-FP: stdy %f13, 524272(%r11)
182 ; CHECK-FP: .cfi_offset %f13, -208
[all …]
Dframe-04.ll19 ; CHECK: std %f13, 176(%r15)
27 ; CHECK: .cfi_offset %f13, -208
36 ; CHECK: ld %f13, 176(%r15)
69 ; so %f13+%f15 is the pair that gets dropped.
86 ; CHECK-NOT: %f13
134 ; CHECK-NOT: %f13
170 ; CHECK-NOT: %f13
Dframe-02.ll18 ; CHECK: std %f13, 176(%r15)
26 ; CHECK: .cfi_offset %f13, -208
35 ; CHECK: ld %f13, 176(%r15)
102 ; CHECK: std %f13, 168(%r15)
109 ; CHECK: .cfi_offset %f13, -208
118 ; CHECK: ld %f13, 168(%r15)
181 ; CHECK-NOT: %f13
228 ; CHECK-NOT: %f13
/external/valgrind/VEX/priv/
Dhost_s390_isel.c1249 HReg op_hi, op_lo, f13, f15; in s390_isel_int_expr_wrk() local
1255 f13 = make_fpr(13); in s390_isel_int_expr_wrk()
1259 addInstr(env, s390_insn_move(8, f13, op_hi)); in s390_isel_int_expr_wrk()
1264 INVALID_HREG, f13, f15, in s390_isel_int_expr_wrk()
1283 HReg op_hi, op_lo, f13, f15; in s390_isel_int_expr_wrk() local
1289 f13 = make_fpr(13); in s390_isel_int_expr_wrk()
1293 addInstr(env, s390_insn_move(8, f13, op_hi)); in s390_isel_int_expr_wrk()
1298 INVALID_HREG, f13, in s390_isel_int_expr_wrk()
1351 HReg op1_hi, op1_lo, op2_hi, op2_lo, f12, f13, f14, f15, cc_s390; in s390_isel_int_expr_wrk() local
1359 f13 = make_fpr(13); in s390_isel_int_expr_wrk()
[all …]
/external/clang/test/CodeGen/
Dfunction-attributes.c60 void f13(void) __attribute__((pure)) __attribute__((const));
61 void f13(void){} in f13() function
/external/python/cpython2/Modules/_ctypes/libffi/src/ia64/
Dunix.S71 ldf.fill f13 = [r16], 32
216 (p10) stfs [r16] = f13, 8
240 (p10) stfd [r16] = f13, 16
264 (p10) stfe [r16] = f13, 32
316 stf.spill [r17] = f13, 32
445 (p10) ldfs f13 = [r17], 8
473 (p10) ldfd f13 = [r17], 16
501 (p10) ldfe f13 = [r17], 32
/external/libffi/src/ia64/
Dunix.S71 ldf.fill f13 = [r16], 32
216 (p10) stfs [r16] = f13, 8
240 (p10) stfd [r16] = f13, 16
264 (p10) stfe [r16] = f13, 32
316 stf.spill [r17] = f13, 32
445 (p10) ldfs f13 = [r17], 8
473 (p10) ldfd f13 = [r17], 16
501 (p10) ldfe f13 = [r17], 32
/external/python/cpython3/Modules/_ctypes/libffi/src/ia64/
Dunix.S71 ldf.fill f13 = [r16], 32
216 (p10) stfs [r16] = f13, 8
240 (p10) stfd [r16] = f13, 16
264 (p10) stfe [r16] = f13, 32
316 stf.spill [r17] = f13, 32
445 (p10) ldfs f13 = [r17], 8
473 (p10) ldfd f13 = [r17], 16
501 (p10) ldfe f13 = [r17], 32

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