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/external/llvm/test/MC/Mips/
Dmicromips-fpu-instructions.s12 # CHECK-EL: add.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x20]
13 # CHECK-EL: add.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x21]
14 # CHECK-EL: div.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x20]
15 # CHECK-EL: div.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x21]
16 # CHECK-EL: mul.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x20]
17 # CHECK-EL: mul.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x21]
18 # CHECK-EL: sub.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x20]
19 # CHECK-EL: sub.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x21]
30 # CHECK-EL: ceil.w.s $f6, $f8 # encoding: [0xc8,0x54,0x3b,0x1b]
31 # CHECK-EL: ceil.w.d $f6, $f8 # encoding: [0xc8,0x54,0x3b,0x5b]
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dvector.ll9 %f8 = type <8 x float>
38 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
39 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
40 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
41 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
42 store %f8 %R, %f8* %S
46 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
47 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
48 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
49 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
/external/llvm/test/CodeGen/X86/
Dvector.ll9 %f8 = type <8 x float>
39 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
40 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
41 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
42 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
43 store %f8 %R, %f8* %S
47 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
48 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
49 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
50 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
Dcoff-comdat.ll45 $f8 = comdat any
46 define x86_fastcallcc void @v8() comdat($f8) {
49 define x86_fastcallcc void @f8() comdat($f8) {
72 ; CHECK: .section .text,"xr",associative,@f8@0
74 ; CHECK: .section .text,"xr",discard,@f8@0
75 ; CHECK: .globl @f8@0
/external/llvm/test/CodeGen/Generic/
Dvector.ll8 %f8 = type <8 x float>
37 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
38 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
39 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
40 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
41 store %f8 %R, %f8* %S
45 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
46 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
47 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
48 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
Dv-split.ll2 %f8 = type <8 x float>
4 define void @test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
5 %p = load %f8, %f8* %P
6 %q = load %f8, %f8* %Q
7 %R = fadd %f8 %p, %q
8 store %f8 %R, %f8 *%S
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Dvector.ll9 %f8 = type <8 x float>
38 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
39 %p = load %f8* %P ; <%f8> [#uses=1]
40 %q = load %f8* %Q ; <%f8> [#uses=1]
41 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
42 store %f8 %R, %f8* %S
46 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
47 %p = load %f8* %P ; <%f8> [#uses=1]
48 %q = load %f8* %Q ; <%f8> [#uses=1]
49 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dvector.ll9 %f8 = type <8 x float>
39 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
40 %p = load %f8* %P ; <%f8> [#uses=1]
41 %q = load %f8* %Q ; <%f8> [#uses=1]
42 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
43 store %f8 %R, %f8* %S
47 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
48 %p = load %f8* %P ; <%f8> [#uses=1]
49 %q = load %f8* %Q ; <%f8> [#uses=1]
50 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
Dvector.ll9 %f8 = type <8 x float>
38 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
39 %p = load %f8* %P ; <%f8> [#uses=1]
40 %q = load %f8* %Q ; <%f8> [#uses=1]
41 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
42 store %f8 %R, %f8* %S
46 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
47 %p = load %f8* %P ; <%f8> [#uses=1]
48 %q = load %f8* %Q ; <%f8> [#uses=1]
49 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
Dv-split.ll2 %f8 = type <8 x float>
4 define void @test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
5 %p = load %f8* %P
6 %q = load %f8* %Q
7 %R = fadd %f8 %p, %q
8 store %f8 %R, %f8 *%S
/external/llvm/test/MC/Sparc/
Dsparc-fp-instructions.s60 ! CHECK: fadds %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x24]
61 ! CHECK: faddd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x44]
62 ! CHECK: faddq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x64]
63 fadds %f0, %f4, %f8
64 faddd %f0, %f4, %f8
65 faddq %f0, %f4, %f8
73 ! CHECK: fsubs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xa4]
74 ! CHECK: fsubd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xc4]
75 ! CHECK: fsubq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xe4]
76 fsubs %f0, %f4, %f8
[all …]
/external/capstone/suite/MC/Sparc/
Dsparc-fp-instructions.s.cs26 0x91,0xa0,0x08,0x24 = fadds %f0, %f4, %f8
27 0x91,0xa0,0x08,0x44 = faddd %f0, %f4, %f8
28 0x91,0xa0,0x08,0x64 = faddq %f0, %f4, %f8
31 0x91,0xa0,0x08,0xa4 = fsubs %f0, %f4, %f8
32 0x91,0xa0,0x08,0xc4 = fsubd %f0, %f4, %f8
33 0x91,0xa0,0x08,0xe4 = fsubq %f0, %f4, %f8
34 0x91,0xa0,0x09,0x24 = fmuls %f0, %f4, %f8
35 0x91,0xa0,0x09,0x44 = fmuld %f0, %f4, %f8
36 0x91,0xa0,0x09,0x64 = fmulq %f0, %f4, %f8
37 0x91,0xa0,0x0d,0x24 = fsmuld %f0, %f4, %f8
[all …]
/external/llvm/test/MC/Disassembler/Sparc/
Dsparc-fp.txt75 # CHECK: fadds %f0, %f4, %f8
78 # CHECK: faddd %f0, %f4, %f8
81 # CHECK: faddq %f0, %f4, %f8
90 # CHECK: fsubs %f0, %f4, %f8
93 # CHECK: fsubd %f0, %f4, %f8
96 # CHECK: fsubq %f0, %f4, %f8
99 # CHECK: fmuls %f0, %f4, %f8
102 # CHECK: fmuld %f0, %f4, %f8
105 # CHECK: fmulq %f0, %f4, %f8
108 # CHECK: fsmuld %f0, %f4, %f8
[all …]
/external/webrtc/webrtc/modules/audio_processing/aec/
Daec_rdft_mips.c272 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cft1st_128_mips() local
511 [f8] "=&f" (f8), [f9] "=&f" (f9), [f10] "=&f" (f10), [f11] "=&f" (f11), in cft1st_128_mips()
521 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cftmdl_128_mips() local
567 [f8] "=&f" (f8), [tmp_a] "=&r" (tmp_a), [count] "=&r" (count) in cftmdl_128_mips()
624 [f8] "=&f" (f8), [tmp_a] "=&r" (tmp_a), [count] "=&r" (count) in cftmdl_128_mips()
712 [f8] "=&f" (f8), [tmp_a] "=&r" (tmp_a), [count] "=&r" (count) in cftmdl_128_mips()
799 [f8] "=&f" (f8), [tmp_a] "=&r" (tmp_a), [count] "=&r" (count) in cftmdl_128_mips()
807 float f0, f1, f2, f3, f4, f5, f6, f7, f8; in cftfsub_128_mips() local
857 [f8] "=&f" (f8), [tmp_a] "=&r" (tmp_a), in cftfsub_128_mips()
865 float f0, f1, f2, f3, f4, f5, f6, f7, f8; in cftbsub_128_mips() local
[all …]
/external/autotest/server/cros/
Drf_switch_1_ap_box_2_ap_list.conf57 [f8:e9:03:c1:9f:58]
63 bss = f8:e9:03:c1:9f:58
64 wan mac = f8:e9:03:c1:9f:5b
70 [f8:e9:03:c1:9f:5a]
76 bss5 = f8:e9:03:c1:9f:5a
77 wan mac = f8:e9:03:c1:9f:5b
109 [48:f8:b3:f9:3e:16]
115 bss = 48:f8:b3:f9:3e:16
116 wan mac = 48:f8:b3:f9:3e:15
122 [48:f8:b3:f9:3e:17]
[all …]
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-xfail-mips64r5.txt12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
63 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
[all …]
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-xfail-mips64r2.txt12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
63 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
[all …]
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-xfail-mips64r3.txt12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
63 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
[all …]
/external/llvm/test/MC/SystemZ/
Dregs-good.s61 #CHECK: ler %f8, %f9 # encoding: [0x38,0x89]
70 ler %f8,%f9
79 #CHECK: ldr %f8, %f9 # encoding: [0x28,0x89]
88 ldr %f8,%f9
95 #CHECK: lxr %f8, %f9 # encoding: [0xb3,0x65,0x00,0x89]
100 lxr %f8,%f9
127 #CHECK: .cfi_offset %f8, 192
161 .cfi_offset %f8,192
/external/mesa3d/src/mesa/sparc/
Dxform.S79 ld [%g1 + 0x00], %f8 ! LSU Group
86 fmuls %f8, M0, %f9 ! FGM Group f1 available
89 fmuls %f8, M1, %f10 ! FGM Group f2 available
92 fmuls %f8, M2, %f11 ! FGM Group f3 available
95 fmuls %f8, M3, %f12 ! FGM Group f4 available
194 ld [%g1 + 0x00], %f8 ! LSU Group
199 fmuls %f8, M0, %f9 ! FGM Group
200 fmuls %f8, M1, %f10 ! FGM Group
469 fmuls %f1, M6, %f8 ! FGM
476 fadds %f4, %f8, %f4 ! FGA Group f8 available
[all …]
/external/llvm/test/CodeGen/SPARC/
DLeonFixFSMULDPassUT.ll6 ; CHECK: fmuld %f2, %f3, %f8
16 …%mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* …
24 ; CHECK: fmuld %f2, %f3, %f8
28 …%mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* …
/external/clang/test/Sema/
Dexpr-address-of.c111 void f8() { in f8() function
112 void *dummy0 = &f8(); // expected-error {{cannot take the address of an rvalue of type 'void'}} in f8()
115 …void *dummy1 = &(1 ? v : f8()); // expected-error {{cannot take the address of an rvalue of type '… in f8()
117 …void *dummy2 = &(f8(), v); // expected-error {{cannot take the address of an rvalue of type 'void'… in f8()
/external/llvm/test/CodeGen/SystemZ/
Dframe-04.ll14 ; CHECK: std %f8, 216(%r15)
22 ; CHECK: .cfi_offset %f8, -168
31 ; CHECK: ld %f8, 216(%r15)
74 ; CHECK: std %f8, 200(%r15)
80 ; CHECK: .cfi_offset %f8, -168
89 ; CHECK: ld %f8, 200(%r15)
122 ; numerical order so the pair should be %f8+%f10.
127 ; CHECK: std %f8, 168(%r15)
129 ; CHECK: .cfi_offset %f8, -168
138 ; CHECK: ld %f8, 168(%r15)
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/ia64/
Dunix.S64 ldf.fill f8 = [in0], 32
165 stfs [in1] = f8
169 stfd [in1] = f8
173 stfe [in1] = f8
205 stfs [in1] = f8, 8
229 stfd [in1] = f8, 16
253 stfe [in1] = f8, 32
308 stf.spill [r16] = f8, 32
388 ldfs f8 = [r16]
396 ldfd f8 = [r16]
[all …]
/external/libffi/src/ia64/
Dunix.S64 ldf.fill f8 = [in0], 32
165 stfs [in1] = f8
169 stfd [in1] = f8
173 stfe [in1] = f8
205 stfs [in1] = f8, 8
229 stfd [in1] = f8, 16
253 stfe [in1] = f8, 32
308 stf.spill [r16] = f8, 32
388 ldfs f8 = [r16]
396 ldfd f8 = [r16]
[all …]

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