/external/llvm/test/MC/AArch64/ |
D | neon-scalar-fp-compare.s | 9 fcmeq h10, h11, h12 21 fcmeq h10, h11, #0.0 24 fcmeq h10, h11, #0 39 fcmge h10, h11, h12 51 fcmge h10, h11, #0.0 54 fcmge h10, h11, #0 69 fcmgt h10, h11, h12 81 fcmgt h10, h11, #0.0 84 fcmgt h10, h11, #0 99 fcmle h10, h11, #0.0 [all …]
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D | fullfp16-neon-neg.s | 250 fcmeq h10, h11, h12 252 fcmeq h10, h11, #0.0 254 fcmeq h10, h11, #0 256 fcmge h10, h11, h12 258 fcmge h10, h11, #0.0 260 fcmge h10, h11, #0 262 fcmgt h10, h11, h12 264 fcmgt h10, h11, #0.0 266 fcmgt h10, h11, #0 268 fcmle h10, h11, #0.0 [all …]
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D | neon-scalar-shift-imm.s | 135 uqshrn b12, h10, #7 136 uqshrn h10, s14, #5 168 sqshrun b15, h10, #7 180 sqrshrun b17, h10, #6 181 sqrshrun h10, s13, #15
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D | neon-scalar-saturating-add-sub.s | 7 sqadd h10, h11, h12 20 uqadd h10, h11, h12 33 sqsub h10, h11, h12 46 uqsub h10, h11, h12
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D | neon-scalar-saturating-shift.s | 7 sqshl h10, h11, h12 20 uqshl h10, h11, h12
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D | neon-scalar-saturating-rounding-shift.s | 7 sqrshl h10, h11, h12 20 uqrshl h10, h11, h12
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D | neon-scalar-mul.s | 9 sqdmulh h10, h11, h12 19 sqrdmulh h10, h11, h12
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D | neon-scalar-recip.s | 45 frecpx h18, h10
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D | neon-scalar-by-elem-saturating-mul.s | 28 sqdmulh h10, h11, v10.h[4]
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D | neon-diagnostics.s | 234 frecpx s18, h10 887 sqdmulh h10, s11, h12 901 sqrdmulh h10, s11, h12 4621 fcmeq h10, s11, #0.0 4649 fcmge h10, s11, #0.0 4677 fcmgt h10, s11, #0.0 4691 fcmle h10, s11, #0.0 4705 fcmlt h10, s11, #0.0 5113 uqshrn b12, h10, #99 5114 uqshrn h10, s14, #99 [all …]
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D | basic-a64-instructions.s | 1832 fcvt h10, s11 1859 fcvt h10, d11 2748 str h10, [x10], #255 2773 ldr h10, [x10], #255 2904 str h10, [x10, #255]! 2929 ldr h10, [x10, #255]!
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/external/capstone/suite/MC/AArch64/ |
D | neon-scalar-shift-imm.s.cs | 28 0x4c,0x95,0x09,0x7f = uqshrn b12, h10, #7 29 0xca,0x95,0x1b,0x7f = uqshrn h10, s14, #5 37 0x4f,0x85,0x09,0x7f = sqshrun b15, h10, #7 40 0x51,0x8d,0x0a,0x7f = sqrshrun b17, h10, #6 41 0xaa,0x8d,0x11,0x7f = sqrshrun h10, s13, #15
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D | neon-scalar-saturating-add-sub.s.cs | 3 0x6a,0x0d,0x6c,0x5e = sqadd h10, h11, h12 7 0x6a,0x0d,0x6c,0x7e = uqadd h10, h11, h12 11 0x6a,0x2d,0x6c,0x5e = sqsub h10, h11, h12 15 0x6a,0x2d,0x6c,0x7e = uqsub h10, h11, h12
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D | neon-scalar-saturating-rounding-shift.s.cs | 3 0x6a,0x5d,0x6c,0x5e = sqrshl h10, h11, h12 7 0x6a,0x5d,0x6c,0x7e = uqrshl h10, h11, h12
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D | neon-scalar-saturating-shift.s.cs | 3 0x6a,0x4d,0x6c,0x5e = sqshl h10, h11, h12 7 0x6a,0x4d,0x6c,0x7e = uqshl h10, h11, h12
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D | neon-scalar-mul.s.cs | 2 0x6a,0xb5,0x6c,0x5e = sqdmulh h10, h11, h12 4 0x6a,0xb5,0x6c,0x7e = sqrdmulh h10, h11, h12
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D | neon-scalar-by-elem-saturating-mul.s.cs | 10 0x6a,0xc9,0x4a,0x5f = sqdmulh h10, h11, v10.h[4]
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D | basic-a64-instructions.s.cs | 708 0x6a,0xc1,0x23,0x1e = fcvt h10, s11 721 0x6a,0xc1,0x63,0x1e = fcvt h10, d11 1082 0x4a,0xf5,0x0f,0x7c = str h10, [x10], #255 1094 0x4a,0xf5,0x4f,0x7c = ldr h10, [x10], #255 1153 0x4a,0xfd,0x0f,0x7c = str h10, [x10, #255]! 1165 0x4a,0xfd,0x4f,0x7c = ldr h10, [x10, #255]!
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/external/libvpx/libvpx/vp9/encoder/mips/msa/ |
D | vp9_fdct16x16_msa.c | 89 v8i16 h0, h1, h2, h3, h4, h5, h6, h7, h10, h11; in fadst16_cols_step2_msa() local 123 BUTTERFLY_4(tp0, tp1, tp3, tp2, out0, out1, h11, h10); in fadst16_cols_step2_msa() 139 MADD_SHORT(h10, h11, k1, k2, out2, out3); in fadst16_cols_step2_msa() 267 v8i16 h0, h1, h2, h3, h4, h5, h6, h7, h10, h11; in fadst16_rows_step2_msa() local 305 BUTTERFLY_4(tp0, tp1, tp3, tp2, out0, out1, h11, h10); in fadst16_rows_step2_msa() 320 MADD_SHORT(h10, h11, k1, k2, out2, out3); in fadst16_rows_step2_msa()
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/external/clang/test/Sema/ |
D | attr-alias-elf.c | 43 void h10() __attribute__((alias("g10"))); // expected-error {{alias definition is part of a cycle}}
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/external/libvpx/libvpx/vpx_dsp/mips/ |
D | idct16x16_msa.c | 329 v8i16 h0, h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11; in vpx_iadst16_1d_columns_addblk_msa() local 381 BUTTERFLY_4(g4, g6, g14, g12, h10, h11, v6, v4); in vpx_iadst16_1d_columns_addblk_msa() 382 BUTTERFLY_4(h8, h9, h11, h10, out0, out1, h11, h10); in vpx_iadst16_1d_columns_addblk_msa() 464 MADD_SHORT(h10, h11, k1, k2, out2, out3); in vpx_iadst16_1d_columns_addblk_msa()
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/external/python/cpython3/Doc/library/ |
D | hashlib.rst | 664 ... h10 = blake2b(digest_size=32, fanout=FANOUT, depth=DEPTH, 667 >>> h10.update(h00.digest()) 668 >>> h10.update(h01.digest()) 669 >>> h10.hexdigest()
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/external/vixl/test/aarch64/ |
D | test-api-aarch64.cc | 173 VIXL_CHECK(AreConsecutive(h10, NoVReg)); in TEST()
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1475 # CHECK: sqdmulh h10, h11, h12 1483 # CHECK: sqrdmulh h10, h11, h12 1928 # CHECK: uqshrn b12, h10, #7 1929 # CHECK: uqshrn h10, s14, #5 1958 # CHECK: sqshrun b15, h10, #7 1968 # CHECK: sqrshrun b17, h10, #6 1969 # CHECK: sqrshrun h10, s13, #15
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D | basic-a64-instructions.txt | 1398 # CHECK: fcvt h10, s11 1425 # CHECK: fcvt h10, d11 2167 # CHECK: str h10, [x10], #255 2192 # CHECK: ldr h10, [x10], #255 2325 # CHECK: str h10, [x10, #255]! 2350 # CHECK: ldr h10, [x10, #255]!
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