Searched refs:hasV8Ops (Results 1 – 6 of 6) sorted by relevance
186 RestrictIT = hasV8Ops(); in initSubtargetFeatures()
401 bool hasV8Ops() const { return HasV8Ops; } in hasV8Ops() function
591 if (Subtarget->hasV8Ops()) in getArchForCPU()701 if (STI.hasV8Ops()) in emitAttributes()829 if (STI.hasDivideInARMMode() && !STI.hasV8Ops()) in emitAttributes()
214 def HasV8 : Predicate<"Subtarget->hasV8Ops()">,216 def PreV8 : Predicate<"!Subtarget->hasV8Ops()">,
859 if (!Subtarget->hasV8Ops() || getTargetMachine().getOptLevel() == 0) { in ARMTargetLowering()
275 bool hasV8Ops() const { in hasV8Ops() function in __anon7f4633df0111::ARMAsmParser3339 if ((hasV7Ops() || hasV8Ops()) && (Num == 10 || Num == 11)) in parseCoprocNumOperand()3913 if (!hasV8Ops() && (Opt == ARM_MB::ISHLD || Opt == ARM_MB::OSHLD || in parseMemBarrierOptOperand()6270 if (RmReg == ARM::SP && !hasV8Ops()) in validateInstruction()8792 if ((Inst.getOperand(I).getReg() == ARM::SP) && !hasV8Ops()) in checkTargetMatchPredicate()8839 if (wasInITBlock && hasV8Ops() && isThumb() && in MatchAndEmitInstruction()10293 if (hasV8Ops() && Op.isReg() && Op.getReg() == ARM::SP) in validateTargetOperandClass()